512Mb, Multiple I/O Serial Flash Memory
Device Protection
Device Protection
Table 3: Data Protection Using Device Protocols
Note 1 applies to the entire table
Protection by:
Description
Power-on reset and internal timer Protects the device against inadvertent data changes while the power supply is out-
side the operating specification.
Command execution check
Ensures that the number of clock pulses is a multiple of one byte before executing a
PROGRAM or ERASE command, or any command that writes to the device registers.
WRITE ENABLE operation
Ensures that commands modifying device data must be preceded by a WRITE ENABLE
command, which sets the write enable latch bit in the status register.
1. Extended, dual, and quad SPI protocol functionality ensures that device data is protec-
ted from excessive noise.
Note:
Table 4: Memory Sector Protection Truth Table
Note 1 applies to the entire table
Sector Lock Register
Sector Lock
Down Bit
Sector Write Lock
Bit
Memory Sector Protection Status
0
0
1
1
0
1
0
1
Sector unprotected from PROGRAM and ERASE operations. Protection status re-
versible.
Sector protected from PROGRAM and ERASE operations. Protection status rever-
sible.
Sector unprotected from PROGRAM and ERASE operations. Protection status not
reversible except by power cycle or reset.
Sector protected from PROGRAM and ERASE operations. Protection status not
reversible except by power cycle or reset.
1. Sector lock register bits are written to when the WRITE TO LOCK REGISTER command is
executed. The command will not execute unless the sector lock down bit is cleared (see
the WRITE TO LOCK REGISTER command).
Note:
Table 5: Protected Area Sizes – Upper Area
Note 1 applies to the entire table
Status Register Content
Memory Content
Top/
Bottom
Bit
BP3
0
BP2
0
BP1
0
BP0
0
Protected Area
Unprotected Area
All sectors
0
None
0
0
0
0
1
Sector 1023
Sectors (0 to 1022)
Sectors (0 to 1021)
Sectors (0 to 1019)
Sectors (0 to 1015)
Sectors (0 to 1007)
0
0
0
1
0
Sectors (1022 to 1023)
Sectors (1020 to 1023)
Sectors (1016 to 1023)
Sectors (1008 to 1023)
0
0
0
1
1
0
0
1
0
0
0
0
1
0
1
PDF: 09005aef84752721
n25q_512mb_1ce_3V_65nm.pdf - Rev. O 05/13 EN
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