512Mb, Multiple I/O Serial Flash Memory
Features
List of Tables
Table 1: Signal Descriptions ............................................................................................................................. 9
Table 2: Sectors[1023:0] ................................................................................................................................. 12
Table 3: Data Protection Using Device Protocols ............................................................................................. 13
Table 4: Memory Sector Protection Truth Table .............................................................................................. 13
Table 5: Protected Area Sizes – Upper Area ..................................................................................................... 13
Table 6: Protected Area Sizes – Lower Area ...................................................................................................... 14
Table 7: SPI Modes ........................................................................................................................................ 15
Table 8: Extended, Dual, and Quad SPI Protocols ............................................................................................ 17
Table 9: Status Register Bit Definitions ........................................................................................................... 19
Table 10: Nonvolatile Configuration Register Bit Definitions ........................................................................... 20
Table 11: Volatile Configuration Register Bit Definitions .................................................................................. 21
Table 12: Sequence of Bytes During Wrap ....................................................................................................... 22
Table 13: Supported Clock Frequencies – STR ................................................................................................. 22
Table 14: Supported Clock Frequencies – DTR ................................................................................................ 22
Table 15: Extended Address Register Bit Definitions ........................................................................................ 24
Table 16: Enhanced Volatile Configuration Register Bit Definitions .................................................................. 24
Table 17: Flag Status Register Bit Definitions .................................................................................................. 25
Table 18: Command Set ................................................................................................................................. 27
Table 19: Lock Register .................................................................................................................................. 35
Table 20: Data/Address Lines for READ ID and MULTIPLE I/O READ ID Commands ....................................... 39
Table 21: Read ID Data Out ............................................................................................................................ 39
Table 22: Extended Device ID, First Byte ......................................................................................................... 39
Table 23: Serial Flash Discovery Parameter Data Structure .............................................................................. 41
Table 24: Parameter ID .................................................................................................................................. 41
Table 25: Command/Address/Data Lines for READ MEMORY Commands ....................................................... 44
Table 26: Command/Address/Data Lines for READ MEMORY Commands – 4-Byte Address ............................. 45
Table 27: Data/Address Lines for PROGRAM Commands ................................................................................ 53
Table 28: Suspend Parameters ....................................................................................................................... 65
Table 29: Operations Allowed/Disallowed During Device States ...................................................................... 66
Table 30: OTP Control Byte (Byte 64) .............................................................................................................. 69
Table 31: XIP Confirmation Bit ....................................................................................................................... 72
Table 32: Effects of Running XIP in Different Protocols .................................................................................... 72
Table 33: Power-Up Timing and VWI Threshold ............................................................................................... 75
Table 34: AC RESET Conditions ...................................................................................................................... 76
Table 35: Absolute Ratings ............................................................................................................................. 80
Table 36: Operating Conditions ...................................................................................................................... 80
Table 37: Input/Output Capacitance .............................................................................................................. 80
Table 38: AC Timing Input/Output Conditions ............................................................................................... 81
Table 39: DC Current Characteristics and Operating Conditions ...................................................................... 82
Table 40: DC Voltage Characteristics and Operating Conditions ...................................................................... 82
Table 41: AC Characteristics and Operating Conditions ................................................................................... 83
Table 42: Part Number Information ................................................................................................................ 88
Table 43: Package Details ............................................................................................................................... 89
PDF: 09005aef84752721
n25q_512mb_1ce_3V_65nm.pdf - Rev. O 05/13 EN
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