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N25Q128A11B1241F 参数 Datasheet PDF下载

N25Q128A11B1241F图片预览
型号: N25Q128A11B1241F
PDF下载: 下载PDF文件 查看货源
内容描述: 128兆位, 1.8 V ,多个I / O , 4 KB的界别分组擦除引导扇区, XIP启用,串行闪存与108 MHz的SPI总线接口 [128-Mbit, 1.8 V, multiple I/O, 4-Kbyte subsector erase on boot sectors, XiP enabled, serial flash memory with 108 MHz SPI bus interface]
分类和应用: 闪存
文件页数/大小: 185 页 / 5874 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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Volatile and Non Volatile Registers  
N25Q128 - 1.8 V  
6
Volatile and Non Volatile Registers  
The device features many different registers to store, in volatile or non volatile mode, many  
parameters and operating configurations:  
„
„
Legacy SPI Status Register  
3 configuration registers:  
Non Volatile Configuration Register (NVCR), 16 bits  
Volatile Configuration Register (VCR), 8 bits  
Volatile Enhanced Configuration Register (VECR), 8 bits  
The Non Volatile Configuration Register (NVCR) affects the memory configuration starting  
from the successive power-on. It can be used to make the memory start in a determined  
condition.  
The VCR and VECR affect the memory configuration after every execution of the related  
Write Volatile configuration Register (WRVCR) and Write Enhanced Volatile Configuration  
register (WRVECR) instructions. These instructions overwrite the memory configuration set  
at POR by NVCR.  
As described in Figure 8.: Non Volatile and Volatile configuration Register Scheme, the  
working condition of the memory is set by an internal configuration register, which is not  
accessible by the user. The working parameters of the internal configuration register are  
loaded from the NVCR during the boot phase of the device. In this sense the NVCR can be  
seen as having the default settings of the memory.  
During the normal life of the application, every time a write volatile or enhanced volatile  
configuration register instruction is performed, the new configuration parameters set in the  
volatile registers are also copied in the internal configuration register, thus instantly affecting  
the memory behavior. Please note that on the next power on the memory will start again in  
the working protocol set by the Non Volatile Register parameters.  
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