N25Q128 - 1.8 V
DC and AC parameters
Table 34. Reset Conditions
Symbol
Alt.
Parameter
Conditions
Min
Typ
Max Unit
tRLRH(1)(2) tRST
Reset pulse width
50
ns
Device selected (S low), while decoding
any modify instruction, during all read
operations, CLFSR, WRDI, WREN,
WRLR, WRVCR, WRVECR.
40
ns
µs
Under completion of an internal erase or
program cycle related to POTP, PP, DIEFP, 30
DIFP, QIEFP, QIFP, SE, BE, PER, PES.
Under completion of an SSE operation.
Under completion of an WRSR operation.
tSSE
ms
ms
Reset Recovery
Time
tRHSL(1)
tREC
tW
Under completion of an WRNVCR
operation.
tWNVCR
ms
µs
ns
ns
ns
Under completion of the first WREN issued
when Fast POR selected.
tDTW
Device deselected (S high) and in XiP
mode.
40
Device deselected (S high) and in Standby
mode.
40
S# deselect to R
valid
Deselect to R valid in Quad Output or in
QIO-SPI.
tSHRV(1)
2
tDP
S High to Deep Power Down mode
S High to Standby mode
3
µs
µs
tRDP
30
1. All values are guaranteed by characterization and not 100% tested in production.
2. The device reset is possible but not guaranteed if tRLRH < 50 ns.
Figure 109. Serial input timing
tSHSL
tSHCH
tCHCL
S
tCHSL
tSLCH
tCHSH
C
tDVCH
tCHDX
tCLCH
MSB IN
LSB IN
DQ0
DQ1
High Impedance
AI13728
175/185
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