N25Q128 - 1.8 V
Instructions
Figure 94. Read NV Configuration Register instruction sequence QIO-SPI
S
0
1
2
3
4
5
C
Instruction
Nonvolatile Configuration
Register Out
4
0
12
8
DQ0
DQ1
5
6
1
2
13
9
14 10
15 11
DQ2
DQ3
7
3
LS Byte MS Byte
Quad_Read_NVCR
9.3.20
Write NV Configuration Register
The Write Non Volatile Configuration register (WRNVCR) instruction allows new values to
be written to the Non Volatile Configuration register. Before it can be accepted, a write
enable (WREN) instruction must previously have been executed.
Apart form the parallelizing of the instruction code and the input data on the four pins DQ0,
DQ1, DQ2 and DQ3, the instruction functionality is exactly the same as the Write Non
Volatile Configuration Register (WRNVCR) instruction of the Extended SPI protocol, please
refer to Section 9.1.29: Write NV Configuration Register for further details.
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