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MT48LC16M8A2FC-8ELIT 参数 Datasheet PDF下载

MT48LC16M8A2FC-8ELIT图片预览
型号: MT48LC16M8A2FC-8ELIT
PDF下载: 下载PDF文件 查看货源
内容描述: 同步DRAM [SYNCHRONOUS DRAM]
分类和应用: 内存集成电路动态存储器时钟
文件页数/大小: 59 页 / 1835 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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128Mb: x4, x8, x16  
SDRAM  
COMMAND INHIBIT  
whether or not auto precharge is used. If auto precharge  
is selected, the row being accessed will be precharged at  
the end of the WRITE burst; if auto precharge is not  
selected, the row will remain open for subsequent ac-  
cesses. Input data appearing on the DQs is written to the  
memory array subject to the DQM input logic level ap-  
pearing coincident with the data. If a given DQM signal is  
registeredLOW, thecorrespondingdatawillbewrittento  
memory; if the DQM signal is registered HIGH, the corre-  
sponding data inputs will be ignored, and a WRITE will  
not be executed to that byte/column location.  
TheCOMMANDINHIBITfunctionpreventsnewcom-  
mands from being executed by the SDRAM, regardless of  
whether the CLK signal is enabled. The SDRAM is effec-  
tively deselected. Operations already in progress are not  
affected.  
NO OPERATION (NOP)  
The NO OPERATION (NOP) command is used to per-  
form a NOP to an SDRAM which is selected (CS# is LOW).  
This prevents unwanted commands from being regis-  
tered during idle or wait states. Operations already in  
progress are not affected.  
PRECHARGE  
The PRECHARGE command is used to deactivate the  
openrowinaparticularbankortheopenrowinallbanks.  
The bank(s) will be available for a subsequent row access  
a specified time (tRP) after the PRECHARGE command is  
issued. Input A10 determines whether one or all banks  
aretobeprecharged, andinthecasewhereonlyonebank  
is to be precharged, inputs BA0, BA1 select the bank.  
Otherwise BA0, BA1 are treated as “Don’t Care.” Once a  
bank has been precharged, it is in the idle state and must  
be activated prior to any READ or WRITE commands  
being issued to that bank.  
LOAD MODE REGISTER  
The mode register is loaded via inputs A0-A11. See  
mode register heading in the Register Definition section.  
The LOAD MODE REGISTER command can only be is-  
sued when all banks are idle, and a subsequent execut-  
able command cannot be issued until tMRD is met.  
ACTIVE  
The ACTIVE command is used to open (or activate) a  
row in a particular bank for a subsequent access. The  
value on the BA0, BA1 inputs selects the bank, and the  
address provided on inputs A0-A11 selects the row. This  
row remains active (or open) for accesses until a  
PRECHARGE command is issued to that bank. A  
PRECHARGE command must be issued before opening a  
different row in the same bank.  
AUTO PRECHARGE  
Auto precharge is a feature which performs the same  
individual-bank PRECHARGE function described above,  
without requiring an explicit command. This is accom-  
plished by using A10 to enable auto precharge in con-  
junction with a specific READ or WRITE command. A  
PRECHARGE of the bank/row that is addressed with the  
READ or WRITE command is automatically performed  
upon completion of the READ or WRITE burst, except in  
the full-page burst mode, where auto precharge does not  
apply. Auto precharge is nonpersistent in that it is either  
enabled or disabled for each individual READ or WRITE  
command.  
Auto precharge ensures that the precharge is initiated  
at the earliest valid stage within a burst. The user must  
not issue another command to the same bank until the  
precharge time (tRP) is completed. This is determined as  
if an explicit PRECHARGE command was issued at the  
earliest possible time, as described for each burst type in  
the Operation section of this data sheet.  
READ  
The READ command is used to initiate a burst read  
access to an active row. The value on the BA0, BA1 inputs  
selects the bank, and the address provided on inputs A0-  
A9, A11 (x4), A0-A9 (x8) or A0-A8 (x16) selects the starting  
column location. The value on input A10 determines  
whether or not auto precharge is used. If auto precharge  
is selected, the row being accessed will be precharged at  
the end of the READ burst; if auto precharge is not se-  
lected, therowwillremainopenforsubsequentaccesses.  
Read data appears on the DQs subject to the logic level on  
the DQM inputs two clocks earlier. If a given DQM signal  
was registered HIGH, the corresponding DQs will be  
High-Z two clocks later; if the DQM signal was registered  
LOW, the DQs will provide valid data.  
BURST TERMINATE  
WRITE  
The BURST TERMINATE command is used to trun-  
cate either fixed-length or full-page bursts. The most  
recently registered READ or WRITE command prior to  
the BURST TERMINATE command will be truncated, as  
shown in the Operation section of this data sheet.  
The WRITE command is used to initiate a burst write  
access to an active row. The value on the BA0, BA1 inputs  
selects the bank, and the address provided on inputs A0-  
A9, A11 (x4), A0-A9 (x8) or A0-A8 (x16) selects the starting  
column location. The value on input A10 determines  
128Mb: x4, x8, x16 SDRAM  
128MSDRAM_E.p65 Rev. E; Pub. 1/02  
Micron Technology, Inc., reserves the right to change products or specifications without notice.  
©2001, Micron Technology, Inc.  
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