512Mb : 32 Me g x 16, 16 Me g x 32 Mo b ile SDRAM
Tim in g Dia g ra m s
Fig u re 52: Alt e rn a t in g Ba n k Writ e Acce sse s
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
t
t
CL
CK
CLK
CKE
t
CH
t
t
CKS CKH
t
t
CMS
CMH
COMMAND
DQM
ACTIVE
NOP
WRITE
NOP
ACTIVE
NOP
WRITE
NOP
NOP
ACTIVE
t
t
CMS
CMH
t
t
AH
AS
ROW
ROW
ROW
COLUMN
m
COLUMN b
ADDR
t
t
t
AS
AH
AH
ENABLE AUTO PRECHARGE
ENABLE AUTO PRECHARGE
ROW
ROW
ROW
A10
t
AS
BANK 0
BANK 0
BANK 1
BANK 1
BA0, BA1
BANK 0
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
DS DH
DS DH
DS DH
DS DH
DS DH
DS DH
DS DH
DS DH
DIN
m
DIN
m
+ 1
DIN
m
+ 2
DIN
m
+ 3
t
D
IN
b
DIN
b
+ 1
D
IN
b
+ 2
DIN
m
+ 3
DQ
t
t
t
RCD - bank 0
WR - bank 0
RP - bank 0
RCD - bank 0
WR - bank 1
t
t
RAS - bank 0
RC - bank 0
t
t
t
RCD - bank 1
RRD
DON’T CARE
Notes: 1. For this example, BL = 4.
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03
MT48H32M16LF_1.fm - Rev. H 6/07 EN
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2005 Micron Technology, Inc. All rights reserved.
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