1Gb: x4, x8, x16 DDR3 SDRAM
Ball Assignments and Descriptions
Table 5: 96-Ball FBGA – x16 Ball Descriptions (Continued)
Symbol
Type
Description
UDM
Input
Input data mask: UDM is an upper-byte, input mask signal for write data. Upper-
byte input data is masked when UDM is sampled HIGH along with that input data
during a WRITE access. Although the UDM ball is input-only, the UDM loading is
designed to match that of the DQ and DQS balls. UDM is referenced to VREFDQ
Data input/output: Lower byte of bidirectional data bus for the x16 configuration.
DQ[7:0] are referenced to VREFDQ
.
DQ0, DQ1, DQ2,
DQ3, DQ4, DQ5,
DQ6, DQ7
I/O
I/O
.
DQ8, DQ9, DQ10,
DQ11, DQ12,
Data input/output: Upper byte of bidirectional data bus for the x16 configuration.
DQ[15:8] are referenced to VREFDQ
.
DQ13, DQ14, DQ15
LDQS, LDQS#
I/O
I/O
Lower byte data strobe: Output with read data. Edge-aligned with read data.
Input with write data. Center-aligned to write data.
UDQS, UDQS#
Upper byte data strobe: Output with read data. Edge-aligned with read data.
Input with write data. DQS is center-aligned to write data.
VDD
Supply
Supply
Power supply: 1.5V 0.075V.
VDDQ
DQ power supply: 1.5V 0.075V. Isolated on the device for improved noise immuni-
ty.
VREFCA
VREFDQ
Supply
Supply
Reference voltage for control, command, and address: VREFCA must be
maintained at all times (including self refresh) for proper device operation.
Reference voltage for data: VREFDQ must be maintained at all times (excluding self
refresh) for proper device operation.
VSS
VSSQ
ZQ
Supply
Supply
Ground.
DQ ground: Isolated on the device for improved noise immunity.
External reference ball for output drive calibration: This ball is tied to an
Reference
external 240Ω resistor (RZQ), which is tied to VSSQ
.
NC
–
No connect: These balls should be left unconnected (the ball has no connection to
the DRAM or to other balls).
PDF: 09005aef826aa906
1Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
24
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