Figure 116: Synchronous ODT (BC4)
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
T12
T13
T14
T15
T16
T17
CK#
CK
CKE
Command
NOP
NOP
NOP
NOP
NOP
NOP
NOP
WRS4
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
ODTH4
ODTH4 (MIN)
ODTH4
ODT
ODTLoff = WL - 2
ODTLoff = WL - 2
ODTLon = WL - 2
ODTLon = WL - 2
t
t
t
t
AOF (MIN)
AON (MAX)
AON (MIN)
AOF (MIN)
RTT,nom
RTT,nom
RTT
t
t
t
AON (MAX)
AON (MIN)
AOF (MAX)
t
AOF (MAX)
Transitioning
Don’t Care
1. WL = 7. RTT,nom is enabled. RTT(WR) is disabled.
2. ODT must be held HIGH for at least ODTH4 after assertion (T1).
3. ODT must be kept HIGH ODTH4 (BC4) or ODTH8 (BL8) after the WRITE command (T7).
Notes:
4. ODTH is measured from ODT first registered HIGH to ODT first registered LOW or from the registration of the
WRITE command with ODT HIGH to ODT registered LOW.
5. Although ODTH4 is satisfied from ODT registered HIGH at T6, ODT must not go LOW before T11 as ODTH4 must
also be satisfied from the registration of the WRITE command at T7.
MICRON [ MICRON TECHNOLOGY ]
