512Mb: x8/x16, 3V, MT28EW Embedded Parallel NOR
Memory Organization
Memory Organization
Memory Configuration
The main memory array is divided into 128KB or 64KW uniform blocks.
Memory Map
Table 2: Blocks[2047:0]
Address Range (x8)
Address Range (x16)
Block
Size
Block
Size
Block
Start
End
Start
End
2047
128KB
FFE 0000h
FFF FFFFh
64KW
7FF 0000h
7FF FFFFh
⋮
⋮
⋮
⋮
⋮
1023
7FE 0000h
7FF FFFFh
3FF 0000h
3FF FFFFh
⋮
⋮
⋮
⋮
⋮
511
3FE 0000h
3FF FFFFh
1FF 0000h
1FF FFFFh
⋮
⋮
⋮
⋮
⋮
255
1FE 0000h
1FF FFFFh
0FF 0000h
0FF FFFFh
⋮
127
⋮
⋮
⋮
⋮
⋮
0FE 0000h
0FF FFFFh
07F 0000h
07F FFFFh
⋮
⋮
⋮
⋮
63
⋮
07E 0000h
⋮
07F FFFFh
⋮
03F 0000h
⋮
03F FFFFh
⋮
0
000 0000h
001 FFFFh
000 0000h
000 FFFFh
1. 128Mb device = Blocks 0–127; 256Mb device = Blocks 0–255; 512Mb device = Blocks 0–
511; 1Gb device = Blocks 0–1023; 2Gb device = Blocks 0–2047.
Note:
PDF: 09005aef855e354a
mt28ew_generation-b_512mb.pdf - Rev. I 05/18 EN
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