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MT250QL01GABA8ESF0AITES 参数 Datasheet PDF下载

MT250QL01GABA8ESF0AITES图片预览
型号: MT250QL01GABA8ESF0AITES
PDF下载: 下载PDF文件 查看货源
内容描述: [3V, Multiple I/O, 4KB, 32KB, 64KB, Sector Erase]
分类和应用:
文件页数/大小: 97 页 / 1038 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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256Mb, 3V Multiple I/O Serial Flash Memory  
Features  
List of Tables  
Table 1: Signal Descriptions ........................................................................................................................... 15  
Table 2: Memory Map .................................................................................................................................... 22  
Table 3: Status Register .................................................................................................................................. 23  
Table 4: Protected Area .................................................................................................................................. 24  
Table 5: Flag Status Register ........................................................................................................................... 25  
Table 6: Extended Address Register ................................................................................................................ 26  
Table 7: Nonvolatile Configuration Register .................................................................................................... 28  
Table 8: Volatile Configuration Register .......................................................................................................... 30  
Table 9: Sequence of Bytes During Wrap ......................................................................................................... 30  
Table 10: Clock Frequencies – STR (in MHz) ................................................................................................... 31  
Table 11: Clock Frequencies – DTR (in MHz) .................................................................................................. 32  
Table 12: Enhanced Volatile Configuration Register ........................................................................................ 33  
Table 13: Sector Protection Register ............................................................................................................... 35  
Table 14: Global Freeze Bit ............................................................................................................................. 35  
Table 15: Nonvolatile and Volatile Lock Bits .................................................................................................... 36  
Table 16: Volatile Lock Bit Register ................................................................................................................. 36  
Table 17: Device ID Data ............................................................................................................................... 37  
Table 18: Extended Device ID Data, First Byte ................................................................................................. 37  
Table 19: Command Set ................................................................................................................................. 39  
Table 20: RESET ENABLE and RESET MEMORY Operations ............................................................................ 45  
Table 21: READ ID and MULTIPLE I/O READ ID Operations ........................................................................... 46  
Table 22: READ MEMORY Operations ............................................................................................................ 48  
Table 23: 4-BYTE READ MEMORY Operations ................................................................................................ 49  
Table 24: WRITE ENABLE/DISABLE Operations ............................................................................................. 57  
Table 25: READ REGISTER Operations ........................................................................................................... 58  
Table 26: WRITE REGISTER Operations .......................................................................................................... 59  
Table 27: CLEAR FLAG STATUS REGISTER Operation ..................................................................................... 61  
Table 28: PROGRAM Operations .................................................................................................................... 62  
Table 29: 4-BYTE PROGRAM Operations ........................................................................................................ 63  
Table 30: ERASE Operations ........................................................................................................................... 66  
Table 31: SUSPEND/RESUME Operations ...................................................................................................... 68  
Table 32: OTP Control Byte (Byte 64) .............................................................................................................. 71  
Table 33: ENTER and EXIT 4-BYTE ADDRESS MODE Operations .................................................................... 72  
Table 34: DEEP POWER-DOWN Operations .................................................................................................... 72  
Table 35: ENTER and RESET QUAD PROTOCOL Operations ............................................................................ 75  
Table 36: CRC Command Sequence on Entire Device ...................................................................................... 76  
Table 37: CRC Command Sequence on a Range .............................................................................................. 77  
Table 38: Operations Allowed/Disallowed During Device States ...................................................................... 78  
Table 39: XIP Confirmation Bit ....................................................................................................................... 80  
Table 40: Effects of Running XIP in Different Protocols .................................................................................... 80  
Table 41: Power-Up Timing and VWI Threshold ............................................................................................... 82  
Table 42: Absolute Ratings ............................................................................................................................. 85  
Table 43: Operating Conditions ...................................................................................................................... 85  
Table 44: Input/Output Capacitance .............................................................................................................. 85  
Table 45: AC Timing Input/Output Conditions ............................................................................................... 86  
Table 46: DC Current Characteristics and Operating Conditions ...................................................................... 87  
Table 47: DC Voltage Characteristics and Operating Conditions ...................................................................... 88  
Table 48: AC Characteristics and Operating Conditions ................................................................................... 89  
Table 49: AC RESET Conditions ...................................................................................................................... 91  
Table 50: Program/Erase Specifications .......................................................................................................... 95  
CCMTD-1725822587-3368  
mt25q-qljs-L256-ABA-xxT.pdf - Rev. K 07/18 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
© 2014 Micron Technology, Inc. All rights reserved.  
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