256Mb, 3V Multiple I/O Serial Flash Memory
AC Characteristics and Operating Conditions
Table 48: AC Characteristics and Operating Conditions (Continued)
Data
Transfer
Rate
Parameter
Symbol
tHHCH
tCHHL
tHHQX
tHLQZ
tCRC
Min
Typ
–
Max
Unit Notes
HOLD setup time (relative to clock)
HOLD hold time (relative to clock)
HOLD to output Low-Z
STR/DTR
STR/DTR
STR/DTR
STR/DTR
STR/DTR
STR/DTR
STR/DTR
STR/DTR
STR/DTR
STR/DTR
STR/DTR
STR/DTR
3.375
–
–
8
8
-
ns
ns
3.375
–
–
–
–
ns
ns
ms
s
3
3
HOLD to output High-Z
–
CRC check time: main block
CRC check time: full chip (256Mb)
Write protect setup time
–
1.3
1
tCRC
–
-
tWHSL
tSHWL
tDP
tRDP
tW
20
100
3
–
–
–
–
–
8
1
ns
ns
us
us
ms
s
6
6
Write protect hold time
–
S# HIGH to deep power-down
S# HIGH to standby mode (DPD exit time)
WRITE STATUS REGISTER cycle time
–
30
–
–
1.3
0.2
WRITE NONVOLATILE CONFIGURATION
REGISTER cycle time
tWNVCR
–
Nonvolatile sector lock time
Program ASP register
tPPBP
tASPP
tPASSP
tPPBE
tPP
STR/DTR
STR/DTR
STR/DTR
STR/DTR
STR/DTR
–
–
–
–
–
–
0.1
0.1
0.2
0.2
120
2.8
0.5
ms
ms
ms
s
Program password
0.8
Erase nonvolatile sector lock array
Page program time (256 bytes)
Page program time (n bytes)
1
1800
1800
us
us
7
8
18 + 2.5 x
int(n/6)
PROGRAM OTP cycle time (64 bytes)
Sector erase time
tPOTP
tSE
tSSE
tSSE
tBE
STR/DTR
STR/DTR
STR/DTR
STR/DTR
STR/DTR
–
–
–
–
–
0.12
0.15
0.05
0.1
0.8
1
ms
s
4KB subsector erase time
32KB subsector erase time
256Mb bulk erase time
0.4
1
s
s
77
231
s
1. Typical values given for TA = 25 °C.
2. tCH + tCL must add up to 1/fC.
Notes:
3. Value guaranteed by characterization; not 100% tested.
4. Expressed as a slew-rate.
5. nonREAD commands are WRITE, PROGRAM, and ERASE.
6. Only applicable as a constraint for a WRITE STATUS REGISTER command when STATUS
REGISTER WRITE is set to 1.
7. Typical value is applied for pattern: 50% "0" and 50% "1".
8. int(n) correspond to the integer part of n, For example int (12/8) = 1, int (32/8) = 4,
int(15.3) = 15.
CCMTD-1725822587-3368
mt25q-qljs-L256-ABA-xxT.pdf - Rev. K 07/18 EN
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