OBSOLETE
4, 8 MEG x 36
PARITY DRAM SIMMs
FAST PAGE MODE
FAST PAGE MODE operations allow faster data opera-
tions (READ or WRITE) within a row-address-defined (A0 -
A10) page boundary. The FAST PAGE MODE cycle is
always initiated with a row address strobed-in by RAS#
followed by a column address strobed-in by CAS#. CAS#
may be toggled-in by holding RAS# LOW and strobing-in
different column addresses, thus executing faster memory
cycles. Returning RAS# HIGH terminates the FAST PAGE
MODE operation.
the RAS# HIGH time. Memory cell data is retained in its
correct state by maintaining power and executing any
RAS# cycle (READ, WRITE) or RAS# refresh cycle (RAS#
ONLY, CBR or HIDDEN) so that all 2,048 combinations of
RAS# addresses (A 0-A10) are executed at least every 32ms,
regardless of sequence. The CBR REFRESH cycle will in-
voke the refresh counter for automatic RAS# addressing.
x18 CONFIGURATION
For x18 applications, the corresponding DQ and CAS#
pins must be connected together (DQ1 to DQ19, DQ2
to DQ20 and so forth, and CAS0# to CAS2# and CAS1# to
CAS3#). Each RAS# is then a bank select for the x18 memory
organization.
REFRESH
Returning RAS# and CAS# HIGH terminates a memory
cycle and decreases chip current to a reduced standby level.
Also, the chip is preconditioned for the next cycle during
FUNCTIONAL BLOCK DIAGRAM
MT12D436 (16MB)
DQ1
DQ9
DQ10
DQ18
DQ1-4
WE#
U1
CAS0#
RAS0#
CAS#
RAS#
OE# A0-A10
DQ1-4
WE#
U2
CAS#
RAS#
OE# A0-A10
D
WE#
Q
DQ1-4
WE#
DQ1-4
WE#
D
WE#
Q
U9
CAS#
RAS#
A0-A10
CAS#
RAS#
U5
CAS#
RAS#
U6
CAS#
RAS#
U10
OE# A0-A10
OE# A0-A10
A0-A10
CAS1#
WE#
11
11
11
11
11
11
DQ19
DQ27
DQ28
DQ36
DQ1-4
WE#
U3
CAS2#
RAS2#
CAS#
RAS#
OE# A0-A10
DQ1-4
WE#
U4
CAS#
RAS#
OE# A0-A10
D
WE#
Q
DQ1-4
WE#
DQ1-4
WE#
D
WE#
Q
U11
CAS#
RAS#
A0-A10
CAS#
RAS#
U7
CAS#
RAS#
U8
CAS#
RAS#
U12
OE# A0-A10
OE# A0-A10
A0-A10
CAS3#
A0-A10
11
11
11
11
11
11
V
CC
V
SS
U1-U12
U1-U12
U1-U8 = 4 Meg x 4 DRAMs
U9-U12 = 4 Meg x 1 DRAMs
4, 8 Meg x 36 Parity DRAM SIMMs
DM45.pm5 – Rev. 3/97
2
Micron Technology, Inc., reserves the right to change products or specifications without notice.
„1997,
Micron Technology, Inc.
MICRON [ MICRON TECHNOLOGY ]
