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MT18VDDT6472AG-40B 参数 Datasheet PDF下载

MT18VDDT6472AG-40B图片预览
型号: MT18VDDT6472AG-40B
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR SDRAM UNBUFFERED DIMM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 29 页 / 679 K
品牌: MICRON [ MICRON TECHNOLOGY ]
 浏览型号MT18VDDT6472AG-40B的Datasheet PDF文件第8页浏览型号MT18VDDT6472AG-40B的Datasheet PDF文件第9页浏览型号MT18VDDT6472AG-40B的Datasheet PDF文件第10页浏览型号MT18VDDT6472AG-40B的Datasheet PDF文件第11页浏览型号MT18VDDT6472AG-40B的Datasheet PDF文件第13页浏览型号MT18VDDT6472AG-40B的Datasheet PDF文件第14页浏览型号MT18VDDT6472AG-40B的Datasheet PDF文件第15页浏览型号MT18VDDT6472AG-40B的Datasheet PDF文件第16页  
256MB, 512MB, 1GB (x72, ECC, DR), PC3200  
184-PIN DDR SDRAM UDIMM  
Ab so lu t e Ma xim u m Ra t in g s  
Stresses greater than those listed m ay cause perm a-  
nent damage to the device. This is a stress rating only,  
and functional operation of the device at these or any  
other conditions above those indicated in the opera-  
tional sections of this specification is not implied.  
Exposure to absolute m axim um rating conditions for  
extended periods m ay affect reliability.  
Voltage on VDD Supply  
Voltage on I/ O Pins  
Relative to VSS . . . . . . . . . . . . . . . . . . . . -1V to +3.6V  
Voltage on VDDQ Supply  
Relative to VSS . . . . . . . . . . . . -0.5V to VDDQ +0.5V  
Operating Temperature  
Relative to VSS. . . . . . . . . . . . . . . . . . . . -1V to +3.6V  
Voltage on VREF and Inputs  
TA (ambient) . . . . . . . . . . . . . . . . . . . . .. 0°C to +70°C  
Storage Temperature (plastic) . . . . . .-55°C to +150°C  
Short Circuit Output Current. . . . . . . . . . . . . . . 50mA  
Relative to VSS. . . . . . . . . . . . . . . . . . . . -1V to +3.6V  
Ta b le 10: DC Ele ct rica l Ch a ra ct e rist ics a n d Op e ra t in g Co n d it io n s  
Notes: 1–5, 14; notes appear on pages 1921; 0°C TA +70°C  
PARAMETER/CONDITION  
SYMBOL  
MIN  
MAX  
UNITS  
NOTES  
Supply Voltage  
VDD  
2.5  
2.5  
2.7  
2.7  
V
V
32, 36, 47  
I/O Supply Voltage  
VDDQ  
32, 36, 39,  
47  
I/O Reference Voltage  
VREF  
0.49 ×  
0.51 ×  
V
6, 39  
VDDQ  
VDDQ  
I/O Termination Voltage (system)  
Input High (Logic 1) Voltage  
Input Low (Logic 0) Voltage  
INPUT LEAKAGE CURRENT  
VTT  
VREF - 0.04 VREF + 0.04  
V
V
V
7, 39  
25  
VIH(DC) VREF + 0.15 VDD + 0.3  
VIL(DC)  
-0.3  
-36  
VREF - 0.15  
36  
25  
Command/  
Any input 0V VIN VDD, VREF pin 0V VIN 1.35V Address, RAS#,  
(All other pins not under test = 0V)  
CAS#, WE#  
CKE, S#  
CK, CK#  
DM  
II  
µA  
µA  
46  
-18  
-12  
-4  
18  
12  
4
IOZ  
-10  
10  
46  
OUTPUT LEAKAGE CURRENT  
DQ, DQS  
(DQ are disabled; 0V VOUT VDDQ)  
OUTPUT LEVELS  
IOH  
IOL  
-16.8  
16.8  
mA  
mA  
High Current (VOUT = VDDQ-0.373V, minimum VREF, minimum VTT)  
Low Current (VOUT = 0.373V, maximum VREF, maximum VTT)  
33, 34  
Ta b le 11: AC In p u t Op e ra t in g Co n d it io n s  
Notes: 1–5, 14, 48; notes appear pages 19–21; 0°C TA +70°C; VDD = VDDQ = +2.6V ±0.1V  
PARAMETER/CONDITION  
SYMBOL  
MIN  
MAX  
UNITS  
NOTES  
VIH(AC)  
VIL(AC)  
VREF + 0.310  
V
V
V
12, 25, 35  
12, 25, 35  
6
Input High (Logic 1) Voltage  
Input Low (Logic 0) Voltage  
I/O Reference Voltage  
VREF - 0.310  
0.51 × VDDQ  
VREF(AC)  
0.49 × VDDQ  
pdf: 09005aef80814e61, source: 09005aef80a43eed  
DDA18C32_64_128x72AG.fm - Rev. E 9/04 EN  
Micron Technology, Inc., reserves the right to change products or specifications without notice.  
©2004 Micron Technology, Inc.  
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