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MT16HTF6464AY 参数 Datasheet PDF下载

MT16HTF6464AY图片预览
型号: MT16HTF6464AY
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR2 SDRAM Unbuffered DIMM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 21 页 / 420 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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512MB, 1GB, 2GB: (x64, DR) 240-Pin DDR2 SDRAM UDIMM  
Serial Presence-Detect  
Table 15: Serial Presence-Detect Matrix  
“1”/“0”: Serial Data, “driven to HIGH”/“driven to LOW”; table notes located on page 19  
Byte  
Description  
Entry (Version) MT16HTF6464A MT16HTF12864A MT16HTF25664A  
0
1
2
3
4
128  
256  
80  
08  
08  
0D  
0A  
80  
08  
08  
0E  
0A  
80  
08  
08  
0E  
0A  
Number of SPD bytes used by Micron  
Total number of bytes in SPD device  
Fundamental memory type  
DDR2 SDRAM  
13, 14  
Number of row addresses on assembly  
10  
Number of column addresses on  
assembly  
5
6
7
8
9
1.18in, dual rank  
61  
40  
00  
05  
61  
40  
00  
05  
61  
40  
00  
05  
DIMM height and module ranks  
Module data width  
64  
0
Reserved  
SSTL 1.8V  
Module voltage interface levels  
DDR2 cycle time, tCK (CL = MAX value,  
see byte 18)  
-80E  
-667  
-53E  
-40E  
25  
30  
3D  
50  
25  
30  
3D  
50  
30  
3D  
50  
DDR2 access from clock,tAC (CL = MAX  
value, see byte 18)  
10  
-80E  
-667  
-53E  
-40E  
40  
45  
50  
60  
40  
45  
50  
60  
45  
50  
60  
11  
12  
13  
00  
82  
08  
00  
82  
08  
00  
82  
08  
Module configuration type  
Refresh rate/type  
7.81µs/self  
8
DDR2 SDRAM device width (primary  
device)  
14  
15  
16  
17  
18  
N/A  
1 clock  
4, 8  
00  
00  
0C  
04  
00  
00  
0C  
04  
00  
00  
0C  
08  
Error-checking DDR2 data width  
Reserved  
Burst lengths supported  
Number of banks on DDR2 device  
CAS latencies supported  
4 or 8  
-80E (6, 5, 4)  
-667 (5, 4, 3)  
-53E/-40E (4, 3)  
38  
18  
30  
38  
18  
30  
38  
18  
19  
20  
21  
22  
01  
02  
00  
01  
02  
00  
01  
02  
00  
Module thickness  
Unbuffered  
DDR2 DIMM type  
DDR2 module attributes  
-80E/-667  
-53E/-40E  
03  
01  
03  
01  
03  
01  
DDR2 device attributes: weak driver  
(01) or 50Ω ODT (03)  
DDR2 cycle time, tCK, MAX CL - 1  
23  
24  
-80E/-667  
-53E  
3D  
50  
50  
3D  
50  
50  
3D  
50  
50  
-40E  
SDRAM access from CK, tAC,  
MAX CL - 1  
-80E  
-667  
-53E  
-40E  
40  
45  
50  
60  
40  
45  
50  
60  
45  
50  
60  
SDRAM cycle time, tCK, MAX CL - 2  
25  
26  
27  
-80E  
-667  
-53E/-40E(N/A)  
50  
00  
00  
50  
00  
00  
50  
00  
SDRAM access from CK, tAC,  
MAX CL - 2  
-80E  
-667  
-53E/-40E(N/A)  
45  
00  
00  
45  
00  
00  
45  
00  
MIN row precharge time, tRP  
-80E  
-667/-53E/-40E  
3C  
32  
3C  
32  
3C  
PDF: 09005aef80f09084/Source: 09005aef80f09068  
HTF16C64_128_256x64AG.fm - Rev. D 5/06 EN  
Micron Technology, Inc., reserves the right to change products or specifications without notice.  
©2003 Micron Technology, Inc. All rights reserved.  
17  
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