M58BW016DT, M58BW016DB, M58BW016FT, M58BW016FB
DC and AC parameters
Figure 15. Synchronous burst read - continuous - valid data ready output
K
(1)
Output
R
V
V
V
V
V
tRLKH
(2)
AI03649
1. Valid Data Ready = Valid Low during valid clock edge.
2. V= Valid output.
3. R is an open drain output with an internal pull up resistor of 1 MΩ. The internal timing of R follows DQ. An external resistor,
typically 300 kΩ. for a single memory on the R bus, should be used to give the data valid set up time required to recognize
that valid data is available on the next valid clock edge.
Figure 16. Synchronous burst read - burst address advance
K
ADD
VALID
L
ADD
G
Q0
Q1
Q2
tGLQV
tBLKH
tBHKH
B
AI03650
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MICRON [ MICRON TECHNOLOGY ]
