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M58BW016FB 参数 Datasheet PDF下载

M58BW016FB图片预览
型号: M58BW016FB
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆位( 512千位×32 ,引导块,爆) [16 Mbit (512 Kbit x 32, boot block, burst)]
分类和应用:
文件页数/大小: 70 页 / 1283 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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Command interface  
M58BW016DT, M58BW016DB, M58BW016FT, M58BW016FB  
4.6  
Block Erase command  
The Block Erase command can be used to erase a block. It sets all of the bits in the block to  
‘1’. All previous data in the block is lost. If the block is protected then the erase operation will  
abort, the data in the block will not be changed and the status register will output the error.  
Two bus write operations are required to issue the command; the first write cycle sets up the  
Block Erase command, the second write cycle confirms the Block Erase command and  
latches the block address in the program/erase controller and starts it. The sequence is  
aborted if the Confirm command is not given and the device will output the status register  
data with bits 4 and 5 set to '1'.  
Once the command is issued subsequent bus read operations read the status register. See  
the section on the status register for details on the definitions of the status register bits.  
During the erase operation the memory will only accept the Read Status Register command  
and the Program/Erase Suspend command. All other commands will be ignored. The  
command can be executed using either VDD (for a normal erase operation) or VPP (for a fast  
erase operation). If VPP is in the VPPH range when the command is issued then a fast erase  
operation will be executed, otherwise the operation will use VDD. If VPP goes below the VPP  
lockout voltage, VPPLK, during a fast erase the operation aborts, the status register VPP  
status bit is set to ‘1’ and the command must be re-issued.  
Typical erase times are given in Table 10.  
See Appendix B: Flowcharts, Figure 24: Block erase flowchart and pseudocode, for a  
suggested flowchart on using the Block Erase command.  
4.7  
Program command  
The Program command is used to program the memory array. Two bus write operations are  
required to issue the command; the first write cycle sets up the Program command, the  
second write cycle latches the address and data to be programmed in the program/erase  
controller and starts it. A program operation can be aborted by writing FFFFFFFFh to any  
address after the program set-up command has been given.  
Once the command is issued subsequent bus read operations read the status register. See  
the section on the status register for details on the definitions of the status register bits.  
During the program operation the memory will only accept the Read Status Register  
command and the Program/Erase Suspend command. All other commands will be ignored.  
If Reset/Power-down, RP, falls to VIL during programming the operation will be aborted.  
The command can be executed using either VDD (for a normal program operation) or VPP  
(for a fast program operation). If VPP is in the VPPH range when the command is issued then  
a fast program operation will be executed, otherwise the operation will use VDD. If VPP goes  
below the VPP lockout voltage, VPPLK, during a fast program the operation aborts and the  
status register VPP status bit is set to ‘1’. As data integrity cannot be guaranteed when the  
program operation is aborted, the memory block must be erased and reprogrammed.  
See Appendix B: Flowcharts on page 59, Figure 22: Program flowchart and pseudocode, for  
a suggested flowchart on using the Program command.  
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