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M29W128GL 参数 Datasheet PDF下载

M29W128GL图片预览
型号: M29W128GL
PDF下载: 下载PDF文件 查看货源
内容描述: 并行NOR闪存的嵌入式存储器 [Parallel NOR Flash Embedded Memory]
分类和应用: 闪存存储
文件页数/大小: 76 页 / 841 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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128Mb 3V Embedded Parallel NOR Flash  
Erase Operations  
After the BLOCK ERASE operation completes, the device returns to read mode, unless  
an error has occurred. If an error occurs, bus READ operations will continue to output  
the status register. A READ/RESET command must be issued to reset the error condi-  
tion and return to read mode.  
If any selected blocks are protected, they are ignored, and all the other selected blocks  
are erased. If all the selected blocks are protected, the BLOCK ERASE operation appears  
to start, but will terminate within approximately100μs, leaving the data unchanged. No  
error condition is given when protected blocks are not erased.  
During the BLOCK ERASE operation, the device ignores all commands except the  
ERASE SUSPEND command and the READ/RESET command, which is accepted only  
during the timeout period. The operation is aborted by performing a reset or powering-  
down the device. In this case, data integrity cannot be ensured, and the aborted blocks  
should be erased again.  
UNLOCK BYPASS BLOCK ERASE Command  
When the device is in unlock bypass mode, the UNLOCK BYPASS BLOCK ERASE  
(80/30h) command can be used to erase one or more memory blocks at a time. The  
command requires two bus WRITE operations instead of six using the standard BLOCK  
ERASE command. The final bus WRITE operation latches the address of the block and  
starts the program/erase controller.  
To erase multiple blocks (after the first two bus WRITE operations have selected the first  
block in the list), each additional block in the list can be selected by repeating the sec-  
ond bus WRITE operation using the address of the additional block.  
The UNLOCK BYPASS BLOCK ERASE command behaves the same way as the BLOCK  
ERASE command: the operation cannot be aborted, and a bus READ operation to the  
memory outputs the status register. (See the BLOCK ERASE Command section for de-  
tails.)  
ERASE SUSPEND Command  
The ERASE SUSPEND (B0h) command temporarily suspends a BLOCK ERASE opera-  
tion. One bus WRITE operation is required to issue the command. The block address is  
"Don't Care."  
The program/erase controller suspends the ERASE operation within the erase suspend  
latency time of the ERASE SUSPEND command being issued. However, when the  
ERASE SUSPEND command is written during the block erase timeout, the device im-  
mediately terminates the timeout period and suspends the ERASE operation. After the  
program/erase controller has stopped, the device operates in read mode, and the erase  
is suspended.  
During an ERASE SUSPEND operation, it is possible to read and execute PROGRAM op-  
erations or WRITE TO BUFFER PROGRAM operations in blocks that are not suspended.  
Both READ and PROGRAM operations behave normally on these blocks. Reading from  
blocks that are suspended will output the status register. If any attempt is made to pro-  
gram in a protected block or in the suspended block, the PROGRAM command is ignor-  
ed, and the data remains unchanged. In this case, the status register is not read, and no  
error condition is given.  
PDF: 09005aef84daa141  
m29w_128mb.pdf - Rev. A 7/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
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© 2012 Micron Technology, Inc. All rights reserved.