128Mb 3V Embedded Parallel NOR Flash
Write AC Characteristics
Figure 25: Chip/Block Erase AC Timing (8-Bit Mode)
t
WC
A[22:0]/A-1
AAAh
AAAh
t
555h
AAAh
AAAh
555h
1
BAh
t
AS
AH
t
CH
t
CS
CE#
t
GHWL
OE#
t
t
WP
WPH
WE#
t
DS
10h/
30h
DQ[7:0]
Notes:
AAh
DH
55h
80h
AAh
55h
t
1. For a CHIP ERASE command, addresses and data are AAAh and 10h, respectively, while
they are BAd and 30h for a BLOCK ERASE command.
2. BAd is the block address.
3. See the following tables for timing details: Read AC Characteristics, WE#-Controlled
Write AC Characteristics, and CE#-Controlled Write AC Characteristics.
PDF: 09005aef84daa141
m29w_128mb.pdf - Rev. A 7/13 EN
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