M25PX16
Instructions
Figure 19. Dual Input Fast Program (DIFP) instruction sequence
S
0
1
2
3
4
5
6
7
8
9
10
28 29 30 31
C
Instruction
24-bit address
23
22 21
3
2
1
0
DQ0
DQ1
High Impedance
S
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
C
6
4
0
2
6
4
2
0
1
6
4
0
1
6
4
2
0
1
6
4
0
1
6
4
2
0
1
2
2
DQ0
DQ1
DATA IN 1
DATA IN 2
DATA IN 3
DATA IN 4
DATA IN 5
DATA IN 256
7
5
3
7
7
5
3
7
5
3
5
3
7
5
1
7
5
3
3
MSB
MSB
MSB
MSB
MSB
MSB
1. A23 to A22 are Don't care.
6.13
Program OTP instruction (POTP)
The Program OTP instruction (POTP) is used to program at most 64 bytes to the OTP
memory area (by changing bits from 1 to 0, only). Before it can be accepted, a Write Enable
(WREN) instruction must previously have been executed. After the Write Enable (WREN)
instruction has been decoded, the device sets the Write Enable Latch (WEL) bit.
The Program OTP instruction is entered by driving Chip Select (S) Low, followed by the
instruction opcode, three address bytes and at least one data byte on Serial Data input
(DQ0).
Chip Select (S) must be driven High after the eighth bit of the last data byte has been
latched in, otherwise the Program OTP instruction is not executed.
There is no rollover mechanism with the Program OTP (POTP) instruction. This means that
the Program OTP (POTP) instruction must be sent with a maximum of 65 bytes to program,
once all 65 bytes have been latched in, any following byte will be discarded.
The instruction sequence is shown in Figure 20.
As soon as Chip Select (S) is driven High, the self-timed Page Program cycle (whose
duration is t ) is initiated. While the Program OTP cycle is in progress, the Status Register
PP
37/65