M25P40 Serial Flash Embedded Memory
AC Characteristics
Table 20: AC Specifications (25 MHz, Device Grade 3, VCC[min]=2.7V) (Continued)
Symbol
tRES1
Alt.
Parameter
Min
Typ
–
Max
30
Unit
μs
Notes
–
–
S# HIGH to STANDBY without electronic signature read
S# HIGH to STANDBY with electronic signature read
–
–
3
3
tRES2
–
30
μs
1. READ DATA BYTES at HIGHER SPEED, PAGE PROGRAM, SECTOR ERASE, BLOCK ERASE,
DEEP POWER-DOWN, READ ELECTRONIC SIGNATURE, WRITE ENABLE/DISABLE, READ ID,
READ/WRITE STATUS REGISTER
Notes:
2. The tCH and tCL signals must be greater than or equal to 1/fC.
3. The tCLCH, tCHCL, tSHQZ, tHHQX, tHLQZ, tDP, tRES1, and tRES2 signal values are guaranteed by
characterization, not 100% tested in production.
4. The tCLCH and tCHCLsignals clock rise and fall time values are expressed as a slew-rate.
5. The tWHSL and tSHWLsignals are only applicable as a constraint for a WRITE STATUS REGIS-
TER command when SRWD bit is set at 1.
Table 21: AC Specifications (50 MHz, Device Grade 6, VCC[min]=2.7V)
Symbol
fC
Alt.
fC
Parameter
Clock frequency for commands (See note)
Clock frequency for READ command
Min
D.C.
D.C.
9
Typ
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Max
50
25
–
Unit
MHz
MHz
ns
Notes
1
fR
–
tCH
tCLH Clock HIGH time
tCLL Clock LOW time
2
tCL
9
–
ns
2
tCLCH
tCHCL
tSLCH
tCHSL
tDVCH
tCHDX
tCHSH
tSHCH
tSHSL
tSHQZ
tCLQV
tCLQX
tHLCH
tCHHH
tHHCH
tCHHL
tHHQX
tHLQZ
tWHSL
tSHWL
tDP
–
–
Clock rise time (peak to peak)
Clock fall time (peak to peak)
0.1
0.1
5
–
V/ns
V/ns
ns
3, 4
3, 4
–
tCSS S# active setup time (relative to C)
S# not active hold time (relative to C)
tDSU Data in setup time
–
—
5
–
ns
2
–
ns
tDH
–
Data in hold time
5
–
ns
S# active hold time (relative to C)
S# not active setup time (relative to C)
5
–
ns
–
5
–
ns
tCSH S# deselect time
100
–
–
ns
tDIS
tV
tHO
–
Output disable time
8
ns
3
Clock LOW to output valid
Output hold time
–
8
ns
0
–
ns
HOLD# setup time (relative to C)
HOLD# hold time (relative to C)
HOLD# setup time (relative to C)
HOLD# hold time (relative to C)
HOLD# to output LOW-Z
5
–
ns
–
5
–
ns
–
5
–
ns
–
5
–
ns
tLZ
tHZ
–
–
8
ns
3
3
5
5
3
HOLD# to output HIGH-Z
–
8
ns
WRITE PROTECT setup time
WRITE PROTECT hold time
S# HIGH to DEEP POWER-DOWN mode
20
100
–
–
ns
–
–
ns
–
3
μs
PDF: 09005aef8456654f
m25p40.pdf - Rev. G 05/13 EN
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41
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