Micron M25P40 Serial Flash Embedded Memory
RELEASE from DEEP POWER-DOWN
RELEASE from DEEP POWER-DOWN
Once the device has entered DEEP POWER-DOWN mode, all commands are ignored ex-
cept RELEASE from DEEP POWER-DOWN and READ ELECTRONIC SIGNATURE. Exe-
cuting either of these commands takes the device out of the DEEP POWER-DOWN
mode.
The RELEASE from DEEP POWER-DOWN command is entered by driving chip select
(S#) LOW, followed by the command code on serial data input (DQ0). S# must be driven
LOW for the entire duration of the sequence.
The RELEASE from DEEP POWER-DOWN command is terminated by driving S# HIGH.
Sending additional clock cycles on serial clock C while S# is driven LOW causes the
command to be rejected and not executed.
After S# has been driven HIGH, followed by a delay, tRES, the device is put in the STAND-
BY mode. S# must remain HIGH at least until this period is over. The device waits to be
selected so that it can receive, decode, and execute commands.
Any RELEASE from DEEP POWER-DOWN command issued while an ERASE, PRO-
GRAM, or WRITE cycle is in progress is rejected without any effect on the cycle that is in
progress.
Figure 19: RELEASE from DEEP POWER-DOWN Command Sequence
0
7
C
DQ0
DQ1
tRDP
LSB
Command
High-Z
MSB
Deep Power-Down Mode
Standby Mode
Don’t Care
PDF: 09005aef8456654f
m25p40.pdf - Rev. Y 8/12 EN
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