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M25P128-VMF6TPB 参数 Datasheet PDF下载

M25P128-VMF6TPB图片预览
型号: M25P128-VMF6TPB
PDF下载: 下载PDF文件 查看货源
内容描述: 128兆位,低电压,串行闪存与54 MHz的SPI总线接口 [128-Mbit, low-voltage, serial flash memory with 54-MHz SPI bus interface]
分类和应用: 闪存内存集成电路光电二极管时钟
文件页数/大小: 47 页 / 905 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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DC and AC parameters  
M25P128  
Table 17. AC characteristics for 130 nm devices (continued)  
Test conditions specified in Table 11 and Table 12  
Symbol  
Alt.  
Parameter  
Bulk Erase Cycle Time  
Bulk Erase Cycle Time (VPP = VPPH  
Min. Typ.  
Max.  
250  
Unit  
105  
tBE  
s
)
56(2)  
1. tCH and tCL must be greater than or equal to 1/fC (max).  
2. Value is guaranteed by characterization, not 100% tested in production.  
3. Expressed as a slew-rate.  
4. Only applicable as a constraint for WRSR instruction when SRWD is set to 1.  
5. VPPH should be kept at a valid level until the program or erase operation has completed and its result  
(success or failure) is known.  
6. When using the Page Program (PP) instruction to program consecutive Bytes, optimized timings are  
obtained with one sequence including all the Bytes versus several sequences of only a few Bytes. If only a  
single byte is programmed, the estimated programming time is close to the time needed to program a full  
page of 256 Bytes. Therefore, it is highly recommended to use the Page Program (PP) instruction with a  
sequence of 256 consecutive Bytes. (1 n 256)  
Figure 20. Serial input timing  
tSHSL  
S
tCHSL  
tSLCH  
tCHSH  
tSHCH  
C
tDVCH  
tCHCL  
tCHDX  
tCLCH  
MSB IN  
LSB IN  
D
Q
High Impedance  
AI01447C  
40/47