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JS28F512P30TF 参数 Datasheet PDF下载

JS28F512P30TF图片预览
型号: JS28F512P30TF
PDF下载: 下载PDF文件 查看货源
内容描述: 美光并行NOR闪存的嵌入式存储器( P30-65nm ) [Micron Parallel NOR Flash Embedded Memory (P30-65nm)]
分类和应用: 闪存存储内存集成电路光电二极管
文件页数/大小: 92 页 / 1225 K
品牌: MICRON [ MICRON TECHNOLOGY ]
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512Mb, 1Gb, 2Gb: P30-65nm  
Program Operations  
Program Resume  
The RESUME command instructs the device to continue programming, and automati-  
cally clears SR[7,2]. This command can be written to any address. If error bits are set,  
the status register should be cleared before issuing the next command. RST# must re-  
main de-asserted.  
Program Protection  
When VPP = VIL, absolute hardware write protection is provided for all device blocks. If  
VPP is at or below VPPLK, programming operations halt and SR3 is set, indicating a VPP  
level error. Block lock registers are not affected by the voltage level on VPP; they may still  
be programmed and read, even if VPP is less than VPPLK  
-
.
Figure 8: Example VPP Supply Connections  
VCC  
VPP  
VCC  
VPP  
VCC  
VCC  
VPP  
PROT#  
<
10K Ω  
-Factory programming with VPP = VPPH  
-Complete with program/erase  
-Low voltage programming only  
-Logic control of device protection  
protection when VPP  
<
VPPLK  
VCC  
VCC  
VPP  
VCC  
VCC  
VPP  
VPP  
V
PPH  
=
-Low voltage and factory programming  
-Low voltage programming only  
-Full device protection unavailable  
PDF: 09005aef845667b3  
p30_65nm_MLC_512Mb-1gb_2gb.pdf - Rev. B 12/13 EN  
Micron Technology, Inc. reserves the right to change products or specifications without notice.  
31  
© 2013 Micron Technology, Inc. All rights reserved.