256Mb and 512Mb (256Mb/256Mb), P30-65nm
Pinouts and Ballouts
Pinouts and Ballouts
Figure 8: 56-Lead TSOP Pinout (256Mb)
WAIT
A17
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
A 16
A 15
DQ15
DQ7
DQ14
DQ 6
DQ13
DQ5
DQ12
DQ4
ADV#
CLK
A 14
A 13
A 12
A 11
A 10
A 9
A 23
A 22
A 21
VSS
RFU
WE #
WP #
A 20
A 19
A 18
A 8
A 7
A 6
A 5
A 4
A 3
A 2
A 24
RFU
VSS
56-Lead TSOP Pinout
14mm x 20mm
RST#
VPP
DQ11
DQ 3
DQ10
DQ 2
VCCQ
DQ 9
DQ1
DQ 8
DQ 0
VCC
Top View
OE#
VSS
CE#
A 1
1. A1 is the least significant address bit.
Notes:
2. A24 is valid for 256Mb densities; otherwise, it is a no connect (NC).
3. No Internal Connection on Pin 13; it may be driven or floated. For legacy designs, it is
VCC pin and can be tied to Vcc.
4. One dimple on package denotes Pin 1 which will always be in the upper left corner of
the package, in reference to the product mark.
PDF: 09005aef84566799
p30_65nm_256Mb-512mb.pdf - Rev. A 1/13 EN
Micron Technology, Inc. reserves the right to change products or specifications without notice.
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