P30-65nm SBC
Table 34: System Interface Information
Hex
Code
Offset Length
Description
Add
Value
VCC logic supply minimum program/erase voltage
bits 0-3 BCD 100 mV
1Bh
1Ch
1
1
1B:
--17
1.7V
bits 4-7 BCD volts
VCC logic supply maximum program/erase voltage
bits 0-3 BCD 100 mV
bits 4-7 BCD volts
1C:
1D:
1E:
--20
--85
--95
2.0V
8.5V
9.5V
VPP [programming] supply minimum program/erase voltage
bits 0-3 BCD 100 mV
bits 4-7 HEX volts
1Dh
1Eh
1
1
VPP [programming] supply maximum program/erase voltage
bits 0-3 BCD 100 mV
bits 4-7 HEX volts
n
1Fh
20h
21h
22h
1
1
1
1
“n” such that typical single word program time-out = 2 µ-sec
1F:
20:
21:
22:
--06
--09
--09
--00
64µs
512µs
0.5s
n
“n” such that typical full buffer write time-out = 2 µ-sec
n
“n” such that typical block erase time-out = 2 m-sec
n
“n” such that typical full chip erase time-out = 2 m-sec
NA
n
“n” such that maximum word program time-out = 2 times
23h
24h
1
1
23:
24:
--02
--02
256µs
typical
n
“n” such that maximum buffer write time-out = 2 times
2048µs
typical
n
“n” such that maximum block erase time-out = 2 times
typical
25h
26h
1
1
25:
26:
--03
--00
4s
n
“n” such that maximum chip erase time-out = 2 times typical
NA
Datasheet
64
Apr 2010
Order Number: 208033-02
MICRON [ MICRON TECHNOLOGY ]
