TCM809/TCM810
3.0
3.1
APPLICATIONS INFORMATION
V
DD
Transient Rejection
Combinations above the curve are detected as a
brown-out or power-down condition. Transient immu-
nity can be improved by adding a capacitor in close
proximity to the V
DD
pin of the TCM809/TCM810.
The TCM809/TCM810 provides accurate V
DD
monitor-
ing and reset timing during power-up, power-down and
brown-out/sag conditions. These devices also reject
negative-going transients (glitches) on the power sup-
ply line. Figure 3-1 shows the maximum transient dura-
tion vs. maximum negative excursion (overdrive) for
glitch rejection. Any combination of duration and over-
drive that lies under the curve will not generate a reset
signal.
V
DD
V
TH
Overdrive
3.2
RESET Signal Integrity During
Power-Down
Duration
Maximum Transient Duration (µsec)
400
320
240
160
TCM8XXL/M/J
(SOT-23)
80
0
TCM8XXZ/R/S/T
(SOT-23)
T
A
= +25°C
The TCM809 RESET output is valid to V
DD
= 1.0V.
Below this voltage the output becomes an "open cir-
cuit" and does not sink current. This means CMOS
logic inputs to the microcontroller will be floating at an
undetermined voltage. Most digital systems are
completely shut down well above this voltage.
However, in situations where RESET must be main-
tained valid to V
DD
= 0V, a pull-down resistor must be
connected from RESET to ground to discharge stray
capacitances and hold the output low (Figure 3-2). This
resistor value, though not critical, should be chosen
such that it does not appreciably load RESET under
normal operation (100 kΩ will be suitable for most
applications). Similarly, a pull-up resistor to V
DD
is
required for the TCM810 to ensure a valid high RESET
for V
DD
below 1.0V.
V
DD
V
DD
TCM809
RESET
R
1
100 kΩ
1
5
1000
100
Reset Comparator Overdrive
[V
TH
- V
DD
] (mv)
GND
130
V
DD
to Reset Delay (µsec)
120
110
100
90
80
70
60
50
40
30
1
10
100
1000
TCM8XXZ/R/S/T
(SC-70)
TCM8XXL/M/J
(SC-70)
FIGURE 3-2:
The addition of R
1
at the
RESET output of the TCM809 ensures that the
RESET output is valid to
V
DD
= 0V.
Reset Comparator Overdrive (mV)
[V
TH
- V
DD
] (mv)
FIGURE 3-1:
Maximum Transient
Duration vs. Overdrive for Glitch Rejection at
+25°C.
2004 Microchip Technology Inc.
DS21661C-page 5
MICROCHIP [ MICROCHIP TECHNOLOGY ]
