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TC7129CPL 参数 Datasheet PDF下载

TC7129CPL图片预览
型号: TC7129CPL
PDF下载: 下载PDF文件 查看货源
内容描述: 4-1 / 2位模拟至数字与片上LCD驱动器转换器 [4-1/2 Digit Analog-to-Digital Converters with On-Chip LCD Drivers]
分类和应用: 驱动器转换器光电二极管
文件页数/大小: 24 页 / 550 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
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TC7129
3.0
DETAILED DESCRIPTION
(All Pin Designations Refer to 40-Pin PDIP.)
The TC7129 is designed to be the heart of a high
resolution analog measurement instrument. The only
additional components required are a few passive ele-
ments: a voltage reference, an LCD, and a power
source. Most component values are not critical; substi-
tutes can be chosen based on the information given
below.
The basic circuit for a digital multimeter application is
shown in Figure 3-1. See Section 4.0, Typical Applica-
tions for variations. Typical values for each component
are shown. The sections below give component selec-
tion criteria.
The resistor and capacitor values are not critical; those
shown work for most applications. In some situations,
the capacitor values may have to be adjusted to com-
pensate for parasitic capacitance in the circuit. The
capacitors can be low cost ceramic devices.
Some applications can use a simple RC network
instead of a crystal oscillator. The RC oscillator has
more potential for jitter, especially in the least
significant digit. See Section 4.8, RC Oscillator.
3.2
Integrating Resistor
(R
INT
)
3.1
Oscillator (X
OSC
, C
O1
, C
O2
, R
O
)
The integrating resistor sets the charging current for
the integrating capacitor. Choose a value that provides
a current between 5µA and 20µA at 2V, the maximum
full scale input. The typical value chosen gives a
charging current of 13.3µA:
The primary criterion for selecting the crystal oscillator
is to choose a frequency that achieves maximum rejec-
tion of line frequency noise. To do this, the integration
phase should last an integral number of line cycles.
The integration phase of the TC7129 is 10,000 clock
cycles on the 200mV range and 1000 clock cycles on
the 2V range. One clock cycle is equal to two oscillator
cycles. For 60Hz rejection, the oscillator frequency
should be chosen so that the period of one line cycle
equals the integration time for the 2V range:
EQUATION 3-2:
I
CHARGE
=
2V
13.3µA
150kΩ
Too high a value for R
INT
increases the sensitivity to
noise pickup and increases errors due to leakage cur-
rent. Too low a value degrades the linearity of the
integration, leading to inaccurate readings.
EQUATION 3-1:
1/60 second = 16.7msec =
1000 clock cycles *2 OSC cycles/clock cycle
OSC Frequency
This equation gives an oscillator frequency of 120kHz.
A similar calculation gives an optimum frequency of
100kHz for 50Hz rejection.
2002 Microchip Technology Inc.
DS21459B-page 7
©