TC1014/TC1015/TC1185
5.0
5.1
THERMAL CONSIDERATIONS
Thermal Shutdown
can be used in conjunction with
to ensure regulator thermal operation is
within limits. For example:
Given:
V
IN
MAX
V
OUT
MIN
I
LOAD
MAX
T
J
MAX
T
A
MAX
=
=
=
=
=
3.0V +10%
2.7V – 2.5%
40 mA
125°C
55°C
Integrated thermal protection circuitry shuts the
regulator off when die temperature exceeds 160°C.
The regulator remains off until the die temperature
drops to approximately 150°C.
5.2
Power Dissipation
The amount of power the regulator dissipates is
primarily a function of input and output voltage, and
output current. The following equation is used to
calculate worst-case actual power dissipation:
Find:
1. Actual power dissipation
2. Maximum allowable dissipation
Actual power dissipation:
P
D
≈
(V
IN
MAX
– V
OUT
MIN
)I
LOAD
MAX
= [(3.0 x 1.1) – (2.7 x .975)]40 x 10
–3
= 26.7 mW
Maximum allowable power dissipation:
(
T
JMAX
–
T
AMAX
)
P
DMAX
= -------------------------------------------
-
θ
JA
=
(
125
–
55
)
-------------------------
220
= 318 mW
In this example, the TC1014 dissipates a maximum of
26.7 mW below the allowable limit of 318 mW. In a
similar manner,
and
can be
used to calculate maximum current and/or input
voltage limits.
EQUATION 5-1:
P
D
≈ (
V
INMAX
–
V
OUTMIN
)I
LOADMAX
Where:
P
D
= Worst-case actual power
dissipation
V
INMAX
= Maximum voltage on V
IN
V
OUTMIN
= Minimum regulator output voltage
I
LOADMAX
= Maximum output (load) current
The
maximum
allowable
power
dissipation
is a function of the maximum ambient
temperature (T
A
MAX
), the maximum allowable die
temperature (T
J
MAX
) and the thermal resistance from
junction-to-air (θ
JA
). The 5-pin SOT-23 package has a
θ
JA
of approximately 220°C/Watt.
EQUATION 5-2:
(
T
JMAX
–
T
AMAX
)
P
DMAX
= -------------------------------------------
-
θ
JA
Where all terms are previously defined.
5.3
Layout Considerations
The primary path of heat conduction out of the package
is via the package leads. Therefore, layouts having a
ground plane, wide traces at the pads, and wide power
supply bus lines combine to lower
θ
JA
and therefore
increase the maximum allowable power dissipation
limit.
©
2007 Microchip Technology Inc.
DS21335E-page 13
MICROCHIP [ MICROCHIP TECHNOLOGY ]
