SST25VF016B
bits [A23-A0]. Address bits [AMS-A12] (AMS = Most Sig-
nificant address) are used to determine the sector
address (SAX), remaining address bits canbeVIL or VIH.
CE# must be driven high before the instruction is exe-
cuted. The user may poll the Busy bit in the software
status register or wait TSE for the completion of the
internal self-timed Sector-Erase cycle. See Figure 4-10
for the Sector-Erase sequence.
4.4.7
4-KBYTE SECTOR-ERASE
The Sector-Erase instruction clears all bits in the
selected 4 KByte sector to FFH. A Sector-Erase
instruction applied to a protected memory area will be
ignored. Prior to any Write operation, the Write-Enable
(WREN) instruction must be executed. CE# must
remain active low for the duration of any command
sequence. The Sector-Erase instruction is initiated by
executing an 8-bit command, 20H, followed by address
FIGURE 4-10:
SECTOR-ERASE SEQUENCE
CE#
MODE 3
0
1
2
3
4
5
6
7
8
15 16
23
31
24
MODE 0
SCK
20
ADD.
MSB
ADD.
ADD.
SI
MSB
HIGH IMPEDANCE
SO
1271 SecErase.0
nificant Address) are used to determine block address
(BAX), remaining address bits can be VIL or VIH. CE#
must be driven high before the instruction is executed. The
64-Kbyte Block-Erase instruction is initiated by executing an
8-bit command D8H, followed by address bits [A23-A0].
Address bits [AMS-A15] are used to determine block address
(BAX), remaining address bits can be VIL or VIH. CE# must
be driven high before the instruction is executed. The user
maypolltheBusybitinthe software status register or wait
TBE for the completion of the internal self-timed 32-
KByte Block-Erase or 64-KByte Block-Erase cycles.
See Figures 4-11 and 4-12 for the 32-KByte Block-
Erase and 64-KByte Block-Erase sequences.
4.4.8
32-KBYTE AND 64-KBYTE BLOCK-
ERASE
The 32-KByte Block-Erase instruction clears all bits in
the selected 32 KByte block to FFH. A Block-Erase
instruction applied to a protected memory area will be
ignored. The 64-KByte Block-Erase instruction clears all bits
in the selected 64 KByte block to FFH. A Block-Erase
instruction applied to a protected memory area will be
ignored. Prior to any Write operation, the Write-Enable
(WREN) instruction must be executed. CE# must remain
active low for the duration of any command sequence.
The 32-Kbyte Block-Erase instruction is initiated by
executing an 8-bit command, 52H, followed by address
bits [A23-A0]. Address bits [AMS-A15] (AMS = Most Sig-
FIGURE 4-11:
32-KBYTE BLOCK-ERASE SEQUENCE
CE#
SCK
MODE 3
MODE 0
0
1
2
3
4
5
6
7
8
15 16
23
31
24
52
ADDR
MSB
ADDR ADDR
SI
MSB
HIGH IMPEDANCE
SO
1271 32KBklEr.0
2015 Microchip Technology Inc.
DS20005044C-page 13
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