PIC18F97J60 FAMILY
64/80/100-Pin High-Performance,
1-Mbit Flash Microcontrollers with Ethernet
Ethernet Features:
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IEEE 802.3™ Compatible Ethernet Controller
Fully Compatible with 10/100/1000Base-T Networks
Integrated MAC and 10Base-T PHY
8-Kbyte Transmit/Receive Packet Buffer SRAM
Supports One 10Base-T Port
Programmable Automatic Retransmit on Collision
Programmable Padding and CRC Generation
Programmable Automatic Rejection of Erroneous
Packets
Activity Outputs for 2 LED Indicators
Buffer:
- Configurable transmit/receive buffer size
- Hardware-managed circular receive FIFO
- Byte-wide random and sequential access
- Internal DMA for fast memory copying
- Hardware assisted checksum calculation for
various protocols
MAC:
- Support for Unicast, Multicast and Broadcast
packets
- Programmable Pattern Match of up to 64 bytes
within packet at user-defined offset
- Programmable wake-up on multiple packet
formats
PHY:
- Wave shaping output filter
Peripheral Highlights:
• High-Current Sink/Source: 25 mA/25 mA on PORTB
and PORTC
• Five Timer modules (Timer0 to Timer4)
• Four External Interrupt pins
• Two Capture/Compare/PWM (CCP) modules
• Three Enhanced Capture/Compare/PWM (ECCP)
modules:
- One, two or four PWM outputs
- Selectable polarity
- Programmable dead time
- Auto-shutdown and auto-restart
• Up to Two Master Synchronous Serial Port (MSSP)
modules supporting SPI (all 4 modes) and I
2
C™
Master and Slave modes
• Up to Two Enhanced USART modules:
- Supports RS-485, RS-232 and LIN 1.2
- Auto-wake-up on Start bit
- Auto-Baud Detect (ABD)
• 10-Bit, Up to 16-Channel Analog-to-Digital Converter
module (A/D):
- Auto-acquisition capability
- Conversion available during Sleep
• Dual Analog Comparators with Input Multiplexing
• Parallel Slave Port (PSP) module
(100-pin devices only)
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Special Microcontroller Features:
• 5.5V Tolerant Inputs (digital-only pins)
• Low-Power, High-Speed CMOS Flash Technology:
- Self-reprogrammable under software control
• C compiler Optimized Architecture for Reentrant Code
• Power Management Features:
- Run: CPU on, peripherals on
- Idle: CPU off, peripherals on
- Sleep: CPU off, peripherals off
• Priority Levels for Interrupts
• 8 x 8 Single-Cycle Hardware Multiplier
• Extended Watchdog Timer (WDT):
- Programmable period from 4 ms to 134s
• Single-Supply 3.3V In-Circuit Serial Programming™
(ICSP™) via Two Pins
• In-Circuit Debug (ICD) with 3 Breakpoints via
Two Pins
• Operating Voltage Range of 2.35V to 3.6V (3.1V to
3.6V using Ethernet module)
• On-Chip 2.5V Regulator
Flexible Oscillator Structure:
• Selectable System Clock derived from Single
25 MHz External Source:
- 2.778 to 41.667 MHz
• Internal 31 kHz Oscillator
• Secondary Oscillator using Timer1 @ 32 kHz
• Fail-Safe Clock Monitor:
- Allows for safe shutdown if oscillator stops
• Two-Speed Oscillator Start-up
External Memory Bus
(100-pin devices only):
• Address Capability of up to 2 Mbytes
• 8-Bit or 16-Bit Interface
• 12-Bit, 16-Bit and 20-Bit Addressing modes
©
2009 Microchip Technology Inc.
DS39762E-page 3
MICROCHIP [ MICROCHIP TECHNOLOGY ]
