PIC18F45J10 FAMILY
TABLE 14-3: REGISTERS ASSOCIATED WITH CAPTURE, COMPARE AND TIMER1
Reset
Values
on page
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
RCON
GIE/GIEH PEIE/GIEL TMR0IE
INT0IE
RI
RBIE
TO
TMR0IF
PD
INT0IF
POR
RBIF
BOR
47
46
49
49
49
49
49
49
50
50
48
48
48
49
49
49
49
49
49
IPEN
—
CM
RCIF
RCIE
RCIP
—
PIR1
PSPIF(1)
PSPIE(1)
PSPIP(1)
OSCFIF
OSCFIE
OSCFIP
ADIF
ADIE
ADIP
CMIF
CMIE
CMIP
TXIF
TXIE
TXIP
—
SSP1IF
SSP1IE
SSP1IP
BCL1IF
BCL1IE
BCL1IP
CCP1IF
TMR2IF TMR1IF
PIE1
CCP1IE TMR2IE TMR1IE
CCP1IP TMR2IP TMR1IP
IPR1
PIR2
—
—
—
—
—
—
CCP2IF
CCP2IE
CCP2IP
PIE2
—
—
IPR2
—
—
TRISB
PORTB Data Direction Control Register
PORTC Data Direction Control Register
Timer1 Register Low Byte
TRISC
TMR1L
TMR1H
T1CON
CCPR1L
CCPR1H
CCP1CON
CCPR2L
CCPR2H
CCP2CON
Timer1 Register High Byte
RD16
T1RUN T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON
Capture/Compare/PWM Register 1 Low Byte
Capture/Compare/PWM Register 1 High Byte
P1M1(1)
P1M0(1)
DC1B1
DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0
Capture/Compare/PWM Register 2 Low Byte
Capture/Compare/PWM Register 2 High Byte
—
—
DC2B1
DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by Capture/Compare or Timer1.
Note 1: These bits are not implemented on 28-pin devices and should be read as ‘0’.
© 2009 Microchip Technology Inc.
DS39682E-page 131