PIC18F2480/2580/4480/4580
FIGURE 6-5:
DATA MEMORY MAP FOR PIC18F2480/4480 DEVICES
When a = 0:
BSR<3:0>
Data Memory Map
The BSR is ignored and the
Access Bank is used.
000h
05Fh
060h
0FFh
100h
00h
Access RAM
GPR
= 0000
= 0001
= 0010
The first 128 bytes are
general purpose RAM
(from Bank 0).
Bank 0
FFh
00h
GPR
GPR
The second 128 bytes are
Special Function Registers
(from Bank 15).
Bank 1
Bank 2
1FFh
200h
FFh
00h
When a = 1:
FFh
00h
2FFh
300h
The BSR specifies the Bank
used by the instruction.
= 0011
Bank 3
Bank 4
Bank 5
Bank 6
Bank 7
Bank 8
Bank 9
Bank 10
Bank 11
Bank 12
Bank 13
3FFh
400h
FFh
00h
= 0100
= 0101
4FFh
500h
FFh
00h
5FFh
600h
FFh
00h
= 0110
= 0111
Access Bank
FFh
00h
6FFh
700h
00h
Access RAM Low
5Fh
Access RAM High
Unimplemented
Read as ‘0’
60h
FFh
00h
7FFh
800h
(SFRs)
= 1000
= 1001
FFh
8FFh
900h
FFh
00h
9FFh
A00h
FFh
00h
= 1010
= 1011
= 1100
= 1101
AFFh
B00h
FFh
00h
BFFh
C00h
FFh
00h
CFFh
D00h
FFh
00h
CAN SFRs
CAN SFRs
DFFh
E00h
FFh
00h
= 1110
= 1111
Bank 14
Bank 15
EFFh
F00h
F5Fh
F60h
FFFh
FFh
00h
CAN SFRs
SFR
FFh
DS39637D-page 74
© 2009 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
