PIC18F2480/2580/4480/4580
Pin Diagrams (Continued)
44-Pin TQFP
1
33
32
31
30
29
28
27
26
25
24
23
RC7/RX/DT
RD4/PSP4/ECCP1/P1A
RD5/PSP5/P1B
NC
RC0/T1OSO/T13CKI
OSC2/CLKO/RA6
OSC1/CLKI/RA7
2
3
4
5
6
7
8
9
10
11
RD6/PSP6/P1C
RD7/PSP7/P1D
VSS
VSS
VDD
PIC18F4480
PIC18F4580
RE2/CS/AN7/C2OUT
RE1/WR/AN6/C1OUT
RE0/RD/AN5
RA5/AN4/SS/HLVDIN
RA4/T0CKI
VDD
RB0/INT0/FLT0/AN10
RB1/INT1/AN8
RB2/INT2/CANTX
RB3/CANRX
44-Pin QFN(1)
1
2
3
4
5
6
7
8
9
33
OSC2/CLKO/RA6
OSC1/CLKI/RA7
VSS
AVSS
VDD
RC7/RX/DT
RD4/PSP4/ECCP1/P1A
RD5/PSP5/P1B
32
31
30
29
28
27
26
25
24
23
RD6/PSP6/P1C
RD7/PSP7/P1D
PIC18F4480
PIC18F4580
AVDD
VSS
AVDD
VDD
RE2/CS/AN7/C2OUT
RE1/WR/AN6/C1OUT
RE0/RD/AN5
RA5/AN4/SS/HLVDIN
RA4/T0CKI
RB0/INT0/FLT0/AN10
RB1/INT1/AN8
10
11
RB2/INT2/CANTX
Note 1: For the QFN package, it is recommended that the bottom pad be connected to VSS.
© 2009 Microchip Technology Inc.
DS39637D-page 5
MICROCHIP [ MICROCHIP ]
