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PIC18F4520-I/P 参数 Datasheet PDF下载

PIC18F4520-I/P图片预览
型号: PIC18F4520-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 412 页 / 6898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2420/2520/4420/4520  
EXAMPLE 8-1:  
8 x 8 UNSIGNED MULTIPLY  
ROUTINE  
8.0  
8.1  
8 x 8 HARDWARE MULTIPLIER  
Introduction  
MOVF  
MULWF  
ARG1, W  
ARG2  
;
; ARG1 * ARG2 ->  
; PRODH:PRODL  
All PIC18 devices include an 8 x 8 hardware multiplier  
as part of the ALU. The multiplier performs an unsigned  
operation and yields a 16-bit result that is stored in the  
product register pair, PRODH:PRODL. The multiplier’s  
operation does not affect any flags in the STATUS  
register.  
EXAMPLE 8-2:  
8 x 8 SIGNED MULTIPLY  
ROUTINE  
Making multiplication a hardware operation allows it to  
be completed in a single instruction cycle. This has the  
advantages of higher computational throughput and  
reduced code size for multiplication algorithms and  
allows the PIC18 devices to be used in many applica-  
tions previously reserved for digital signal processors.  
A comparison of various hardware and software  
multiply operations, along with the savings in memory  
and execution time, is shown in Table 8-1.  
MOVF  
MULWF  
ARG1, W  
ARG2  
; ARG1 * ARG2 ->  
; PRODH:PRODL  
; Test Sign Bit  
; PRODH = PRODH  
BTFSC  
SUBWF  
ARG2, SB  
PRODH, F  
;
- ARG1  
MOVF  
BTFSC  
SUBWF  
ARG2, W  
ARG1, SB  
PRODH, F  
; Test Sign Bit  
; PRODH = PRODH  
;
- ARG2  
8.2  
Operation  
Example 8-1 shows the instruction sequence for an 8 x 8  
unsigned multiplication. Only one instruction is required  
when one of the arguments is already loaded in the  
WREG register.  
Example 8-2 shows the sequence to do an 8 x 8 signed  
multiplication. To account for the sign bits of the argu-  
ments, each argument’s Most Significant bit (MSb) is  
tested and the appropriate subtractions are done.  
TABLE 8-1:  
Routine  
PERFORMANCE COMPARISON FOR VARIOUS MULTIPLY OPERATIONS  
Program  
Memory  
(Words)  
Time  
Cycles  
(Max)  
Multiply Method  
@ 40 MHz @ 10 MHz @ 4 MHz  
Without hardware multiply  
Hardware multiply  
13  
1
69  
1
6.9 μs  
100 ns  
9.1 μs  
600 ns  
24.2 μs  
2.8 μs  
25.4 μs  
4.0 μs  
27.6 μs  
400 ns  
36.4 μs  
2.4 μs  
69 μs  
1 μs  
91 μs  
6 μs  
8 x 8 unsigned  
8 x 8 signed  
Without hardware multiply  
Hardware multiply  
33  
6
91  
6
Without hardware multiply  
Hardware multiply  
21  
28  
52  
35  
242  
28  
254  
40  
96.8 μs  
11.2 μs  
102.6 μs  
16.0 μs  
242 μs  
28 μs  
254 μs  
40 μs  
16 x 16 unsigned  
16 x 16 signed  
Without hardware multiply  
Hardware multiply  
© 2008 Microchip Technology Inc.  
DS39631E-page 89  
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