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PIC18F4520-I/P 参数 Datasheet PDF下载

PIC18F4520-I/P图片预览
型号: PIC18F4520-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器与10位A / D和纳瓦技术 [28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology]
分类和应用: 闪存微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 412 页 / 6898 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F2420/2520/4420/4520  
TABLE 1-3:  
Pin Name  
PIC18F4420/4520 PINOUT I/O DESCRIPTIONS  
Pin Number  
Pin Buffer  
Type Type  
Description  
PDIP QFN TQFP  
MCLR/VPP/RE3  
MCLR  
1
18  
18  
Master Clear (input) or programming voltage (input).  
Master Clear (Reset) input. This pin is an active-low  
Reset to the device.  
I
ST  
VPP  
RE3  
P
I
Programming voltage input.  
Digital input.  
ST  
ST  
OSC1/CLKI/RA7  
OSC1  
13  
32  
30  
Oscillator crystal or external clock input.  
Oscillator crystal input or external clock source input.  
ST buffer when configured in RC mode;  
analog otherwise.  
I
I
CLKI  
CMOS  
TTL  
External clock source input. Always associated with  
pin function, OSC1. (See related OSC1/CLKI,  
OSC2/CLKO pins.)  
RA7  
I/O  
General purpose I/O pin.  
OSC2/CLKO/RA6  
OSC2  
14  
33  
31  
Oscillator crystal or clock output.  
Oscillator crystal output. Connects to crystal  
or resonator in Crystal Oscillator mode.  
In RC mode, OSC2 pin outputs CLKO which  
has 1/4 the frequency of OSC1 and denotes  
the instruction cycle rate.  
O
O
CLKO  
RA6  
I/O  
TTL  
General purpose I/O pin.  
Legend: TTL = TTL compatible input  
ST = Schmitt Trigger input with CMOS levels  
= Output  
CMOS = CMOS compatible input or output  
I
= Input  
O
P
= Power  
Note 1: Default assignment for CCP2 when Configuration bit, CCP2MX, is set.  
2: Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.  
DS39631E-page 16  
© 2008 Microchip Technology Inc.  
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