PIC18F2420/2520/4420/4520
TABLE 1-2:
PIC18F2420/2520 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin Buffer
Type Type
Pin Name
Description
PORTA is a bidirectional I/O port.
SPDIP,
QFN
SOIC
RA0/AN0
RA0
2
3
4
27
28
1
I/O
I
TTL
Analog
Digital I/O.
Analog input 0.
AN0
RA1/AN1
RA1
I/O
I
TTL
Analog
Digital I/O.
Analog input 1.
AN1
RA2/AN2/VREF-/CVREF
RA2
I/O
TTL
Digital I/O.
AN2
VREF-
CVREF
I
I
O
Analog
Analog
Analog
Analog input 2.
A/D reference voltage (low) input.
Comparator reference voltage output.
RA3/AN3/VREF+
RA3
5
6
7
2
3
4
I/O
I
I
TTL
Analog
Analog
Digital I/O.
Analog input 3.
A/D reference voltage (high) input.
AN3
VREF+
RA4/T0CKI/C1OUT
RA4
I/O
I
O
ST
ST
—
Digital I/O.
Timer0 external clock input.
Comparator 1 output.
T0CKI
C1OUT
RA5/AN4/SS/HLVDIN/
C2OUT
RA5
I/O
I
I
I
O
TTL
Analog
TTL
Analog
—
Digital I/O.
Analog input 4.
SPI slave select input.
High/Low-Voltage Detect input.
Comparator 2 output.
AN4
SS
HLVDIN
C2OUT
RA6
RA7
See the OSC2/CLKO/RA6 pin.
See the OSC1/CLKI/RA7 pin.
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
= Output
CMOS = CMOS compatible input or output
I
= Input
O
P
= Power
Note 1: Default assignment for CCP2 when Configuration bit, CCP2MX, is set.
2: Alternate assignment for CCP2 when Configuration bit, CCP2MX, is cleared.
© 2008 Microchip Technology Inc.
DS39631E-page 13
MICROCHIP [ MICROCHIP ]
