PIC18F45J10 FAMILY
TABLE 5-2:
Register
INITIALIZATION CONDITIONS FOR ALL REGISTERS
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets,
CM Resets
Power-on Reset,
Brown-out Reset
Wake-up via WDT
or Interrupt
Applicable Devices
TOSU
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
PIC18F2XJ10 PIC18F4XJ10
---0 0000
0000 0000
0000 0000
00-0 0000
---0 0000
0000 0000
0000 0000
--00 0000
0000 0000
0000 0000
0000 0000
xxxx xxxx
xxxx xxxx
0000 000x
1111 -1-1
11-0 0-00
N/A
---0 0000
0000 0000
0000 0000
uu-0 0000
---0 0000
0000 0000
0000 0000
--00 0000
0000 0000
0000 0000
0000 0000
uuuu uuuu
uuuu uuuu
0000 000u
1111 -1-1
11-0 0-00
N/A
---0 uuuu(1)
uuuu uuuu(1)
uuuu uuuu(1)
uu-u uuuu(1)
---u uuuu
uuuu uuuu
PC + 2(2)
--uu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu(3)
uuuu -u-u(3)
uu-u u-uu(3)
N/A
TOSH
TOSL
STKPTR
PCLATU
PCLATH
PCL
TBLPTRU
TBLPTRH
TBLPTRL
TABLAT
PRODH
PRODL
INTCON
INTCON2
INTCON3
INDF0
POSTINC0
POSTDEC0
PREINC0
PLUSW0
FSR0H
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
---- xxxx
xxxx xxxx
xxxx xxxx
N/A
---- uuuu
uuuu uuuu
uuuu uuuu
N/A
---- uuuu
uuuu uuuu
uuuu uuuu
N/A
FSR0L
WREG
INDF1
POSTINC1
POSTDEC1
PREINC1
PLUSW1
FSR1H
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
---- xxxx
xxxx xxxx
---- 0000
---- uuuu
uuuu uuuu
---- 0000
---- uuuu
uuuu uuuu
---- uuuu
FSR1L
BSR
Legend: u= unchanged, x= unknown, -= unimplemented bit, read as ‘0’, q= value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
4: See Table 5-1 for Reset value for specific condition.
© 2009 Microchip Technology Inc.
DS39682E-page 47
MICROCHIP [ MICROCHIP ]
