PIC18F2450/4450
TBLWT
Table Write
TBLWT
Table Write (Continued)
Syntax:
TBLWT ( *; *+; *-; +*)
None
Example 1:
TBLWT *+;
Operands:
Operation:
Before Instruction
if TBLWT*
TABLAT
TBLPTR
HOLDING REGISTER
(00A356h)
=
=
55h
00A356h
(TABLAT) → Holding Register;
TBLPTR – No Change;
if TBLWT*+
(TABLAT) → Holding Register;
(TBLPTR) + 1 → TBLPTR;
if TBLWT*-
(TABLAT) → Holding Register;
(TBLPTR) – 1 → TBLPTR;
if TBLWT+*
(TBLPTR) + 1 → TBLPTR;
(TABLAT) → Holding Register
=
FFh
After Instructions (table write completion)
TABLAT
TBLPTR
HOLDING REGISTER
(00A356h)
=
=
55h
00A357h
=
55h
Example 2:
TBLWT +*;
Before Instruction
TABLAT
TBLPTR
=
=
34h
01389Ah
HOLDING REGISTER
(01389Ah)
Status Affected: None
=
FFh
Encoding:
0000
0000
0000
11nn
nn=0 *
=1 *+
=2 *-
=3 +*
HOLDING REGISTER
(01389Bh)
=
FFh
After Instruction (table write completion)
TABLAT
TBLPTR
=
=
34h
01389Bh
HOLDING REGISTER
(01389Ah)
Description:
This instruction uses the 3 LSBs of TBLPTR
to determine which of the 8 holding
registers the TABLAT is written to. The
holding registers are used to program the
contents of Program Memory (P.M.). (Refer
to Section 6.0 “Flash Program Memory”
for additional details on programming Flash
memory.)
=
=
FFh
34h
HOLDING REGISTER
(01389Bh)
The TBLPTR (a 21-bit pointer) points to
each byte in the program memory. TBLPTR
has a 2-Mbyte address range. The LSb of
the TBLPTR selects which byte of the
program memory location to access.
TBLPTR[0] = 0: Least Significant Byte of
Program Memory Word
TBLPTR[0] = 1: Most Significant Byte of
Program Memory Word
The TBLWT instruction can modify the
value of TBLPTR as follows:
•
•
•
•
no change
post-increment
post-decrement
pre-increment
Words:
1
2
Cycles:
Q Cycle Activity:
Q1
Q2
No
Q3
No
Q4
No
Decode
operation operation operation
No
No No No
operation operation operation operation
(Read
TABLAT)
(Write to
Holding
Register)
DS39760A-page 250
Advance Information
© 2006 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
