PIC18F2450/4450
TABLE 1-3:
Pin Name
PIC18F4450 PINOUT I/O DESCRIPTIONS
Pin Number
Pin Buffer
Type Type
Description
PDIP QFN TQFP
MCLR/Vpp/RE3
MCLR
1
18
18
Master Clear (input) or programming voltage (input).
Master Clear (Reset) input. This pin is an
active-low Reset to the device.
Programming voltage input.
I
ST
ST
VPP
RE3
P
I
Digital input.
OSC1/CLKI
OSC1
13
14
32
33
30
31
Oscillator crystal or external clock input.
I
I
Analog
Analog
Oscillator crystal input or external clock source input.
External clock source input. Always associated with
pin function OSC1. (See OSC2/CLKO pin.)
CLKI
OSC2/CLKO/RA6
OSC2
Oscillator crystal or clock output.
O
O
—
—
Oscillator crystal output. Connects to crystal or
resonator in Crystal Oscillator mode.
In select modes, OSC2 pin outputs CLKO which has
1/4 the frequency of OSC1 and denotes the instruction
cycle rate.
CLKO
RA6
I/O
TTL
General purpose I/O pin.
Legend: TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
= Output
CMOS = CMOS compatible input or output
I
= Input
O
P
= Power
Note 1: These pins are No Connect unless the ICPRT Configuration bit is set. For NC/ICPORTS, the pin is No
Connect unless ICPRT is set and the DEBUG Configuration bit is cleared.
DS39760A-page 16
Advance Information
© 2006 Microchip Technology Inc.
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