PIC18F2420/2520/4420/4520
is selected by the CVRR bit (CVRCON<5>). The
primary difference between the ranges is the size of the
steps selected by the CVREF Selection bits
21.0 COMPARATOR VOLTAGE
REFERENCE MODULE
(CVR<3:0>), with one range offering finer resolution.
The equations used to calculate the output of the
comparator voltage reference are as follows:
The comparator voltage reference is a 16-tap resistor
ladder network that provides a selectable reference
voltage. Although its primary purpose is to provide a
reference for the analog comparators, it may also be
used independently of them.
If CVRR = 1:
CVREF = ((CVR<3:0>)/24) x CVRSRC
If CVRR = 0:
A block diagram of the module is shown in Figure 21-1.
The resistor ladder is segmented to provide two ranges
of CVREF values and has a power-down function to
conserve power when the reference is not being used.
The module’s supply reference can be provided from
either device VDD/VSS or an external voltage reference.
CVREF = (CVRSRC x 1/4) + (((CVR<3:0>)/32) x
CVRSRC)
The comparator reference supply voltage can come
from either VDD and VSS, or the external VREF+ and
VREF- that are multiplexed with RA2 and RA3. The
voltage source is selected by the CVRSS bit
(CVRCON<4>).
21.1 Configuring the Comparator
Voltage Reference
The settling time of the comparator voltage reference
must be considered when changing the CVREF out-
put (see Table 26-3 in Section 26.0 “Electrical
Characteristics”).
The voltage reference module is controlled through the
CVRCON register (Register 21-1). The comparator
voltage reference provides two ranges of output volt-
age, each with 16 distinct levels. The range to be used
REGISTER 21-1: CVRCON: COMPARATOR VOLTAGE REFERENCE CONTROL REGISTER
R/W-0
R/W-0
CVROE(1)
R/W-0
CVRR
R/W-0
R/W-0
CVR3
R/W-0
CVR2
R/W-0
CVR1
R/W-0
CVR0
CVREN
CVRSS
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared x = Bit is unknown
bit 7
bit 6
CVREN: Comparator Voltage Reference Enable bit
1= CVREF circuit powered on
0= CVREF circuit powered down
CVROE: Comparator VREF Output Enable bit(1)
1= CVREF voltage level is also output on the RA2/AN2/VREF-/CVREF pin
0= CVREF voltage is disconnected from the RA2/AN2/VREF-/CVREF pin
bit 5
CVRR: Comparator VREF Range Selection bit
1= 0 to 0.667 CVRSRC, with CVRSRC/24 step size (low range)
0= 0.25 CVRSRC to 0.75 CVRSRC, with CVRSRC/32 step size (high range)
bit 4
CVRSS: Comparator VREF Source Selection bit
1= Comparator reference source, CVRSRC = (VREF+) – (VREF-)
0= Comparator reference source, CVRSRC = VDD – VSS
bit 3-0
CVR3:CVR0: Comparator VREF Value Selection bits (0 ≤ (CVR<3:0>) ≤ 15)
When CVRR = 1:
CVREF = ((CVR<3:0>)/24) • (CVRSRC)
When CVRR = 0:
CVREF = (CVRSRC/4) + ((CVR<3:0>)/32) • (CVRSRC)
Note 1: CVROE overrides the TRISA<2> bit setting.
© 2008 Microchip Technology Inc.
DS39631E-page 239
MICROCHIP [ MICROCHIP ]
