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PIC18F25J10-I/SS 参数 Datasheet PDF下载

PIC18F25J10-I/SS图片预览
型号: PIC18F25J10-I/SS
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能, RISC微控制器 [28/40/44-Pin High-Performance, RISC Microcontrollers]
分类和应用: 微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 368 页 / 5652 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F45J10 FAMILY  
FIGURE 2-1:  
RECOMMENDED  
MINIMUM CONNECTIONS  
2.0  
2.1  
GUIDELINES FOR GETTING  
STARTED WITH PIC18FJ  
MICROCONTROLLERS  
(2)  
C2  
VDD  
Basic Connection Requirements  
Getting started with the PIC18F45J10 family family of  
8-bit microcontrollers requires attention to a minimal  
set of device pin connections before proceeding with  
development.  
(1)  
(1)  
R1  
R2  
ENVREG  
MCLR  
VCAP/VDDCORE  
C1  
The following pins must always be connected:  
C7  
PIC18FXXJXX  
• All VDD and VSS pins  
(see Section 2.2 “Power Supply Pins”)  
VDD  
VSS  
VSS  
VDD  
(2)  
(2)  
C3  
C6  
• All AVDD and AVSS pins, regardless of whether or  
not the analog device features are used  
(see Section 2.2 “Power Supply Pins”)  
• MCLR pin  
(see Section 2.3 “Master Clear (MCLR) Pin”)  
(2)  
(2)  
C4  
C5  
• ENVREG (if implemented) and VCAP/VDDCORE pins  
(see Section 2.4 “Voltage Regulator Pins  
(VCAP/VDDCORE)”)  
Key (all values are recommendations):  
These pins must also be connected if they are being  
used in the end application:  
C1 through C6: 0.1 μF, 20V ceramic  
C7: 10 μF, 6.3V or greater, tantalum or ceramic  
R1: 10 k  
• PGC/PGD pins used for In-Circuit Serial  
Programming™ (ICSP™) and debugging purposes  
(see Section 2.5 “ICSP Pins”)  
R2: 100to 470Ω  
Note 1: See Section 2.4 “Voltage Regulator Pins  
(VCAP/VDDCORE)” for explanation of  
ENVREG pin connections.  
• OSCI and OSCO pins when an external oscillator  
source is used  
(see Section 2.6 “External Oscillator Pins”)  
2: The example shown is for a PIC18FJ device  
with five VDD/VSS and AVDD/AVSS pairs.  
Other devices may have more or less pairs;  
adjust the number of decoupling capacitors  
appropriately.  
Additionally, the following pins may be required:  
• VREF+/VREF- pins used when external voltage  
reference for analog modules is implemented  
Note:  
The AVDD and AVSS pins must always be  
connected, regardless of whether any of  
the analog modules are being used.  
The minimum mandatory connections are shown in  
Figure 2-1.  
© 2009 Microchip Technology Inc.  
DS39682E-page 23  
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