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PIC18F25J10-I/SS 参数 Datasheet PDF下载

PIC18F25J10-I/SS图片预览
型号: PIC18F25J10-I/SS
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚高性能, RISC微控制器 [28/40/44-Pin High-Performance, RISC Microcontrollers]
分类和应用: 微控制器和处理器外围集成电路光电二极管PC时钟
文件页数/大小: 368 页 / 5652 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18F45J10 FAMILY  
15.4.7.1  
Auto-Shutdown and Automatic  
Restart  
15.4.8  
START-UP CONSIDERATIONS  
When the ECCP module is used in the PWM mode, the  
application hardware must use the proper external pull-  
up and/or pull-down resistors on the PWM output pins.  
When the microcontroller is released from Reset, all of  
the I/O pins are in the high-impedance state. The  
external circuits must keep the power switch devices in  
the OFF state until the microcontroller drives the I/O  
pins with the proper signal levels, or activates the PWM  
output(s).  
The auto-shutdown feature can be configured to allow  
automatic restarts of the module following a shutdown  
event. This is enabled by setting the PRSEN bit of the  
ECCP1DEL register (ECCP1DEL<7>).  
In Shutdown mode with PRSEN = 1(Figure 15-10), the  
ECCPASE bit will remain set for as long as the cause  
of the shutdown continues. When the shutdown condi-  
tion clears, the ECCPASE bit is cleared. If PRSEN = 0  
(Figure 15-11), once a shutdown condition occurs, the  
ECCPASE bit will remain set until it is cleared by firm-  
ware. Once ECCPASE is cleared, the Enhanced PWM  
will resume at the beginning of the next PWM period.  
The CCP1M<1:0> bits (CCP1CON<1:0>) allow the  
user to choose whether the PWM output signals are  
active-high or active-low for each pair of PWM output  
pins (P1A/P1C and P1B/P1D). The PWM output  
polarities must be selected before the PWM pins are  
configured as outputs. Changing the polarity configura-  
tion while the PWM pins are configured as outputs is  
not recommended, since it may result in damage to the  
application circuits.  
Note:  
Writing to the ECCPASE bit is disabled  
while a shutdown condition is active.  
Independent of the PRSEN bit setting, if the auto-  
shutdown source is one of the comparators, the  
shutdown condition is a level. The ECCPASE bit  
cannot be cleared as long as the cause of the shutdown  
persists.  
The P1A, P1B, P1C and P1D output latches may not be  
in the proper states when the PWM module is initialized.  
Enabling the PWM pins for output at the same time as  
the ECCP module may cause damage to the applica-  
tion circuit. The ECCP module must be enabled in the  
proper output mode and complete a full PWM cycle  
before configuring the PWM pins as outputs. The com-  
pletion of a full PWM cycle is indicated by the TMR2IF  
bit being set as the second PWM period begins.  
The Auto-Shutdown mode can be forced by writing a ‘1’  
to the ECCPASE bit.  
FIGURE 15-10:  
PWM AUTO-SHUTDOWN (PRSEN = 1, AUTO-RESTART ENABLED)  
PWM Period  
Shutdown Event  
ECCPASE bit  
PWM Activity  
Normal PWM  
Start of  
PWM Period  
PWM  
Resumes  
Shutdown  
Event Occurs Event Clears  
Shutdown  
FIGURE 15-11:  
PWM AUTO-SHUTDOWN (PRSEN = 0, AUTO-RESTART DISABLED)  
PWM Period  
Shutdown Event  
ECCPASE bit  
PWM Activity  
Normal PWM  
ECCPASE  
Cleared by  
Firmware  
Start of  
PWM Period  
Shutdown  
Shutdown  
PWM  
Resumes  
Event Occurs Event Clears  
DS39682E-page 146  
© 2009 Microchip Technology Inc.