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PIC18F8620-I/PT 参数 Datasheet PDF下载

PIC18F8620-I/PT图片预览
型号: PIC18F8620-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 八十〇分之六十四引脚高性能1 Mbit的增强型闪存微控制器与A / D [64/80-Pin High Performance 1 Mbit Enhanced FLASH Microcontrollers with A/D]
分类和应用: 闪存微控制器和处理器外围集成电路PC时钟
文件页数/大小: 366 页 / 6797 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18FXX20  
2.6.1  
SYSTEM CLOCK SWITCH BIT  
Note: The Timer1 oscillator must be enabled and  
operating to switch the system clock  
source. The Timer1 oscillator is enabled by  
setting the T1OSCEN bit in the Timer1  
Control register (T1CON). If the Timer1  
oscillator is not enabled, then any write to  
the SCS bit will be ignored (SCS bit forced  
cleared) and the main oscillator will  
continue to be the system clock source.  
The system clock source switching is performed under  
software control. The system clock switch bit, SCS  
(OSCCON<0>) controls the clock switching. When the  
SCS bit is ‘0’, the system clock source comes from the  
main oscillator that is selected by the FOSC configura-  
tion bits in Configuration Register1H. When the SCS bit  
is set, the system clock source will come from the  
Timer1 oscillator. The SCS bit is cleared on all forms of  
RESET.  
REGISTER 2-1:  
OSCCON REGISTER  
U-0  
bit 7  
U-0  
U-0  
U-0  
U-0  
U-0  
U-0  
R/W-1  
SCS  
bit 0  
bit 7-1 Unimplemented: Read as '0'  
bit 0 SCS: System Clock Switch bit  
When OSCSEN configuration bit = 0and T1OSCEN bit is set:  
1= Switch to Timer1 oscillator/clock pin  
0= Use primary oscillator/clock input pin  
When OSCSEN and T1OSCEN are in other states:  
Bit is forced clear  
Legend:  
R = Readable bit  
- n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
2003 Microchip Technology Inc.  
Advance Information  
DS39609A-page 25  
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