PIC18FXX20
REGISTER 23-3: CONFIG2H: CONFIGURATION REGISTER 2 HIGH (BYTE ADDRESS 300003h)
U-0
—
bit 7
U-0
—
U-0
—
U-0
—
R/P-1
R/P-1
R/P-1
R/P-1
WDTPS2 WDTPS1 WDTPS0 WDTEN
bit 0
bit 7-4
bit 3-1
Unimplemented: Read as ‘0’
WDTPS2:WDTPS0: Watchdog Timer Postscale Select bits
111= 1:128
110= 1:64
101= 1:32
100= 1:16
011= 1:8
010= 1:4
001= 1:2
000= 1:1
bit 0
WDTEN: Watchdog Timer Enable bit
1= WDT enabled
0= WDT disabled (control is placed on the SWDTEN bit)
Legend:
R = Readable bit
P = Programmable bit
U = Unimplemented bit, read as ‘0’
- n = Value when device is unprogrammed
u = Unchanged from programmed state
REGISTER 23-4: CONFIG3L:CONFIGURATIONREGISTER3LOW(BYTEADDRESS300004h)(1)
R/P-1
WAIT
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
R/P-1
PM1
R/P-1
PM0
bit 7
bit 0
bit 7
WAIT: External Bus Data Wait Enable bit
1= Wait selections unavailable for Table Reads and Table Writes
0= Wait selections for Table Reads and Table Writes are determined by WAIT1:WAIT0 bits
(MEMCOM<5:4>)
bit 6-2
bit 1-0
Unimplemented: Read as ‘0’
PM1:PM0: Processor Mode Select bits
11= Microcontroller mode
10= Microprocessor mode
01= Microprocessor with Boot Block mode
00= Extended Microcontroller mode
Note 1: This register is unimplemented in PIC18F6X20 devices; maintain these bits set.
Legend:
R = Readable bit
P = Programmable bit
U = Unimplemented bit, read as ‘0’
- n = Value when device is unprogrammed
u = Unchanged from programmed state
DS39609A-page 242
Advance Information
2003 Microchip Technology Inc.