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PIC18F8620-I/PT 参数 Datasheet PDF下载

PIC18F8620-I/PT图片预览
型号: PIC18F8620-I/PT
PDF下载: 下载PDF文件 查看货源
内容描述: 八十〇分之六十四引脚高性能1 Mbit的增强型闪存微控制器与A / D [64/80-Pin High Performance 1 Mbit Enhanced FLASH Microcontrollers with A/D]
分类和应用: 闪存微控制器和处理器外围集成电路PC时钟
文件页数/大小: 366 页 / 6797 K
品牌: MICROCHIP [ MICROCHIP ]
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PIC18FXX20  
Figure 14-1 is a simplified block diagram of the Timer3  
module.  
Register 14-1 shows the Timer3 control register. This  
register controls the Operating mode of the Timer3  
module and sets the CCP clock source.  
Register 12-1 shows the Timer1 control register. This  
register controls the Operating mode of the Timer1  
module, as well as contains the Timer1 oscillator  
enable bit (T1OSCEN), which can be a clock source for  
Timer3.  
14.0 TIMER3 MODULE  
The Timer3 module timer/counter has the following  
features:  
• 16-bit timer/counter  
(two 8-bit registers; TMR3H and TMR3L)  
• Readable and writable (both registers)  
• Internal or external clock select  
• Interrupt-on-overflow from FFFFh to 0000h  
• RESET from CCP module trigger  
REGISTER 14-1: T3CON: TIMER3 CONTROL REGISTER  
R/W-0  
RD16  
bit 7  
R/W-0  
R/W-0  
R/W-0  
R/W-0  
R/W-0  
R/W-0  
R/W-0  
T3CCP2 T3CKPS1 T3CKPS0 T3CCP1 T3SYNC TMR3CS TMR3ON  
bit 0  
bit 7  
RD16: 16-bit Read/Write Mode Enable bit  
1= Enables register Read/Write of Timer3 in one 16-bit operation  
0= Enables register Read/Write of Timer3 in two 8-bit operations  
bit 6,3  
T3CCP2:T3CCP1: Timer3 and Timer1 to CCPx Enable bits  
11=Timer3 and Timer4 are the clock sources for CCP1 through CCP5  
10=Timer3 and Timer4 are the clock sources for CCP3 through CCP5;  
Timer1 and Timer2 are the clock sources for CCP1 and CCP2  
01=Timer3 and Timer4 are the clock sources for CCP2 through CCP5;  
Timer1 and Timer2 are the clock sources for CCP1  
00=Timer1 and Timer2 are the clock sources for CCP1 through CCP5  
bit 5-4  
bit 2  
T3CKPS1:T3CKPS0: Timer3 Input Clock Prescale Select bits  
11= 1:8 Prescale value  
10= 1:4 Prescale value  
01= 1:2 Prescale value  
00= 1:1 Prescale value  
T3SYNC: Timer3 External Clock Input Synchronization Control bit  
(Not usable if the system clock comes from Timer1/Timer3.)  
When TMR3CS = 1:  
1= Do not synchronize external clock input  
0= Synchronize external clock input  
When TMR3CS = 0:  
This bit is ignored. Timer3 uses the internal clock when TMR3CS = 0.  
bit 1  
bit 0  
TMR3CS: Timer3 Clock Source Select bit  
1= External clock input from Timer1 oscillator or T13CKI  
(on the rising edge after the first falling edge)  
0= Internal clock (FOSC/4)  
TMR3ON: Timer3 On bit  
1= Enables Timer3  
0= Stops Timer3  
Legend:  
R = Readable bit  
- n = Value at POR  
W = Writable bit  
‘1’ = Bit is set  
U = Unimplemented bit, read as ‘0’  
‘0’ = Bit is cleared x = Bit is unknown  
2003 Microchip Technology Inc.  
Advance Information  
DS39609A-page 143  
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