PIC18CXX2
4.0
MEMORY ORGANIZATION
There are two memory blocks in Enhanced MCU
devices. These memory blocks are:
• Program Memory
• Data Memory
Each block has its own bus so that concurrent access
can occur.
4.1
Program Memory Organization
A 21-bit program counter is capable of addressing the
2-Mbyte program memory space. Accessing a location
between the physically implemented memory and the
2-Mbyte address will cause a read of all ’0’s (a NOP
instruction).
PIC18C252 and PIC18C452 have 32-KBytes of
EPROM, while PIC18C242 and PIC18C442 have
16-KBytes of EPROM. This means that PIC18CX52
devices can store up to 16K of single word instruc-
tions, and PIC18CX42 devices can store up to 8K of
single word instructions.
The reset vector address is at 0000h and the interrupt
vector addresses are at 0008h and 0018h.
Figure 4-1 shows the Program Memory Map for
PIC18C242/442 devices and Figure 4-2 shows the
Program Memory Map for PIC18C252/452 devices.
7/99 Microchip Technology Inc.
Preliminary
DS39026B-page 33
MICROCHIP [ MICROCHIP ]
