PIC18F2331/2431/4331/4431
REGISTER 23-7: CONFIG5L: CONFIGURATION REGISTER 5 LOW (BYTE ADDRESS 300008h)
U-0
—
U-0
—
U-0
—
U-0
—
R/C-1
CP3(1,2)
R/C-1
CP2(1,2)
R/C-1
CP1(2)
R/C-1
CP0(2)
bit 7
bit 0
Legend:
R = Readable bit
C = Clearable bit
U = Unimplemented bit, read as ‘0’
-n = Value when device is unprogrammed
U = Unchanged from programmed state
bit 7-4
bit 3
Unimplemented: Read as ‘0’
CP3: Code Protection bit(1,2)
1= Block 3 is not code-protected
0= Block 3 is code-protected
bit 2
bit 1
bit 0
CP2: Code Protection bit(1,2)
1= Block 2 is not code-protected
0= Block 2 is code-protected
CP1: Code Protection bit(2)
1= Block 1 is not code-protected
0= Block 1 is code-protected
CP0: Code Protection bit(2)
1= Block 0 is not code-protected
0= Block 0 is code-protected
Note 1: Unimplemented in PIC18F2331/4331 devices; maintain this bit set.
2: Refer to Figure 23-5 for block boundary addresses.
REGISTER 23-8: CONFIG5H: CONFIGURATION REGISTER 5 HIGH (BYTE ADDRESS 300009h)
R/C-1
CPD(1)
R/C-1
CPB(1)
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
bit 7
bit 0
Legend:
R = Readable bit
C = Clearable bit
U = Unimplemented bit, read as ‘0’
-n = Value when device is unprogrammed
U = Unchanged from programmed state
bit 7
CPD: Data EEPROM Code Protection bit(1)
1= Data EEPROM is not code-protected
0= Data EEPROM is code-protected
bit 6
CPB: Boot Block Code Protection bit(1)
1= Boot Block is not code-protected
0= Boot Block is code-protected
bit 5-0
Unimplemented: Read as ‘0’
Note 1: Refer to Figure 23-5 for block boundary addresses.
DS39616D-page 270
2010 Microchip Technology Inc.