欢迎访问ic37.com |
会员登录 免费注册
发布采购

PIC18F4431-I/P 参数 Datasheet PDF下载

PIC18F4431-I/P图片预览
型号: PIC18F4431-I/P
PDF下载: 下载PDF文件 查看货源
内容描述: 28 /40/ 44引脚增强型闪存微控制器采用纳瓦技术,高性能PWM和A / D [28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High-Performance PWM and A/D]
分类和应用: 闪存微控制器
文件页数/大小: 392 页 / 3127 K
品牌: MICROCHIP [ MICROCHIP ]
 浏览型号PIC18F4431-I/P的Datasheet PDF文件第257页浏览型号PIC18F4431-I/P的Datasheet PDF文件第258页浏览型号PIC18F4431-I/P的Datasheet PDF文件第259页浏览型号PIC18F4431-I/P的Datasheet PDF文件第260页浏览型号PIC18F4431-I/P的Datasheet PDF文件第262页浏览型号PIC18F4431-I/P的Datasheet PDF文件第263页浏览型号PIC18F4431-I/P的Datasheet PDF文件第264页浏览型号PIC18F4431-I/P的Datasheet PDF文件第265页  
PIC18F2331/2431/4331/4431  
22.5 Operation During Sleep  
22.7 Applications  
When enabled, the LVD circuitry continues to operate  
during Sleep. If the device voltage crosses the trip  
point, the LVDIF bit will be set and the device will wake-  
up from Sleep. Device execution will continue from the  
interrupt vector address if interrupts have been globally  
enabled.  
Figure 22-3 shows a possible application voltage curve  
(typically for batteries). Over time, the device voltage  
decreases. When the device voltage equals voltage,  
VA, the LVD logic generates an interrupt. This occurs at  
time, TA. The application software then has the time,  
until the device voltage is no longer in valid operating  
range, to perform “housekeeping tasks” and to shut  
down the system. Voltage point, VB, is the minimum  
valid operating voltage specification. This occurs at  
time, TB. The difference, TB TA, is the total time for  
shutdown.  
22.6 Effects of a Reset  
A device Reset forces all registers to their Reset state.  
This forces the LVD module to be turned off.  
FIGURE 22-3:  
TYPICAL LOW-VOLTAGE DETECT APPLICATION  
VA  
VB  
Legend:  
VA = LVD trip point  
VB = Minimum valid device  
operating voltage  
TB  
TA  
Time  
TABLE 22-1: REGISTERS ASSOCIATED WITH LOW-VOLTAGE DETECT MODULE  
Name  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
LVDCON  
INTCON  
IPR2  
IRVST  
LVDEN  
INT0IE  
EEIP  
LVDL3  
RBIE  
LVDL2  
TMR0IF  
LVDIP  
LVDIF  
LVDL1  
INT0IF  
LVDL0  
RBIF  
GIE/GIEH PEIE/GIEL TMR0IE  
OSCFIP  
OSCFIF  
OSCFIE  
CCP2IP  
CCP2IF  
CCP2IE  
PIR2  
EEIF  
PIE2  
EEIE  
LVDIE  
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the LVD module.  
2010 Microchip Technology Inc.  
DS39616D-page 261  
 复制成功!