PIC18FXX20
TABLE 1-2:
PIC18FXX20 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
Pin
Buffer
Type
Pin Name
Description
Type
PIC18F6X20 PIC18F8X20
PORTG is a bi-directional I/O port.
RG0/CCP3
RG0
3
5
I/O
I/O
ST
ST
Digital I/O.
Capture3 input/Compare3 output/
PWM3 output.
CCP3
RG1/TX2/CK2
RG1
4
6
I/O
O
I/O
ST
—
ST
Digital I/O.
TX2
USART 2 asynchronous transmit.
USART 2 synchronous clock
(see RX2/DT2).
CK2
RG2/RX2/DT2
RG2
5
7
I/O
I
I/O
ST
ST
ST
Digital I/O.
RX2
USART 2 asynchronous receive.
USART 2 synchronous data
(see TX2/CK2).
DT2
RG3/CCP4
RG3
6
8
8
I/O
I/O
ST
ST
Digital I/O.
CCP4
Capture4 input/Compare4 output/
PWM4 output.
RG4/CCP5
RG4
10
I/O
I/O
ST
ST
Digital I/O.
CCP5
Capture5 input/Compare5 output/
PWM5 output.
Legend: TTL = TTL compatible input
CMOS = CMOS compatible input or output
Analog = Analog input
ST = Schmitt Trigger input with CMOS levels
I
= Input
= Power
O
= Output
P
OD
= Open Drain (no P diode to VDD)
Note 1: Alternate assignment for CCP2 when CCP2MX is not selected (all Operating modes except
Microcontroller).
2: Default assignment when CCP2MX is set.
3: External memory interface functions are only available on PIC18F8X20 devices.
4: CCP2 is multiplexed with this pin by default when configured in Microcontroller mode. Otherwise, it is
multiplexed with either RB3 or RC1.
5: PORTH and PORTJ are only available on PIC18F8X20 (80-pin) devices.
6: AVDD must be connected to a positive supply and AVSS must be connected to a ground reference for proper
operation of the part in User or ICSP modes. See parameter D001A for details.
DS39609A-page 18
AdvanceInformation
2003 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
